1 Exhibit 2.3 AMENDMENT NO. 1 TO ASSET ACQUISITION AGREEMENT This AMENDMENT NO. 1, dated as of January 15, 1999 (this "AMENDMENT"), amends the Asset Acquisition Agreement, dated as of November 24, 1998 (the "AGREEMENT"), by and among Adaptec, Inc., a Delaware corporation ("AIM"), Adaptec Mfg. (S) Pte. Ltd., a wholly-owned Singapore subsidiary of AIM ("AMS" and, together with AIM, "SELLER") and STMicroelectronics, Inc., a Delaware corporation ("PURCHASER"), and the schedules and exhibits thereto. WHEREAS, Seller and Purchaser mutually desire to supplement and amend certain provisions of the Agreement and the schedules and exhibits thereto, and enter into certain other agreements, the parties agree as follows: SECTION 1. Supplements and Amendments. 1.1. The definition of "Closing Accounts Receivable" in Section 1.1 of the Agreement shall be deleted. 1.2. The definition of "Inventory" in Section 1.1 of the Agreement shall be supplemented by adding to such definition the following sentences at the end thereof: Inventory shall also include certain engineering materials associated with the Products, and the Net Inventory Price Adjustment shall be adjusted upward for the aggregate actual cost to Seller of such engineering materials. The summary of the Inventory Adjustments to be delivered by Seller to Purchaser pursuant to Section 8.2(d) shall include a list of such engineering materials and their purchase prices. 1.3. Section 2.3 of the Agreement shall be amended by inserting the following immediately after "Adjustment" in the fourth line thereof: minus (z) $216,730. 1.4. Section 2.5(i) of the Agreement shall be amended by inserting immediately after the phrase "sole cost and expense" on the sixth line thereof: "; and provided further, however, that Purchaser shall have the option to delay the delivery of the Business Assets that will be utilized by its employees located at Seller's Milpitas, California and Longmont, Colorado facilities until the termination of the respective Occupancy License Agreements attached hereto as Exhibit C." 1.5. Section 5.13 of the Agreement shall be deleted and replaced in its entirety with the following: Purchaser shall use all commercially reasonable efforts to assist Seller in collecting all of Seller's accounts receivable, unbilled receivables, notes and other amounts receivable from third parties in respect of Products sold by Seller prior to the Closing. 2 1.6. Section 5.15 of the Agreement (Third Party Tools) shall be deleted and replaced in its entirety with the following: Seller shall use all commercially reasonable efforts to have those portions of the licenses to the third party tools specified in Schedule 13 transferred to Purchaser. 1.7. Section 12.14 of the Agreement shall be added as follows: Purchaser shall use best efforts to provide Seller with binding, non-cancelable purchase orders corresponding to the following Adaptec purchase orders: -------------------------------------------------------------------------------------- SUPPLIER CODE AIC # PO QTY TOTAL $ DESCRIPTION -------- NAME ----- -- --- ------- ----------- -------------------------------------------------------------------------------------- ADI: Pre-Amp 1304A 45035100 6 Wfrs $73,700 NRE + Eng. Wafers -------------------------------------------------------------------------------------- TSMC: Pipeline B 43C97B 45036215 6 Wfrs $10,476 Eng. Wafers -------------------------------------------------------------------------------------- TSMC: Meeker 8387A 45021362 12 Wfrs $12,960 Matrix Lot -------------------------------------------------------------------------------------- 1.8. Schedule 1 to the Agreement (Assumed Liabilities) shall be supplemented by adding to such schedule the following: Relocation and other costs related to the former employees of Analog Devices, Inc. 1.9. Schedule 2 to the Agreement (Intangible Assets) shall be supplemented by adding the following three Patents to such schedule: - ------------------------------- ----------------------- ----------------------- ---------------------- Title Status Inventors Adaptec Code - ------------------------------- ----------------------- ----------------------- ---------------------- Efficient Interpolator For In Process Thomas Conway High Speed Timing Recovery Jason Byrne - ------------------------------- ----------------------- ----------------------- ---------------------- Digital Timing Recovery In Process Thomas Conway Using Baud Rate Sampling Jason Byrne - ------------------------------- ----------------------- ----------------------- ---------------------- A Reduced Computation Open Disclosure Kevin McCall Method For Determining The Signal Amplitude At The Input Of An ADC Samling At Twice Nyquist - ------------------------------- ----------------------- ----------------------- ---------------------- 1.10. Schedule 2 to the Agreement (Intangible Assets) shall be supplemented by adding the following Mask Works to such schedule: 2 3 Device Mask Work Registration - ------ ---------------------- 4421AT MW 12-721 8323AQ MW 11-467 8325BM MW 12-789 8375BQ MW 11-682 8375BT MW 11-682 8381AQ MW 12-723 8381BT MW 13-594 8381BU MW 13-594 1.11. Schedule 4 to the Agreement (Products) shall be supplemented by adding the following Products to such schedule: --------------------------- ------------------------------- DEVICE STATUS --------------------------- ------------------------------- 1394GB ENG --------------------------- ------------------------------- 4421AT PROD --------------------------- ------------------------------- 43C97AM EOL --------------------------- ------------------------------- 5460BP ENG --------------------------- ------------------------------- 5460C1P PROD --------------------------- ------------------------------- 5460C1V PROD --------------------------- ------------------------------- 5463AP ENG --------------------------- ------------------------------- 5463BP ENG --------------------------- ------------------------------- 8323AQ EOL --------------------------- ------------------------------- 8325BM PROD --------------------------- ------------------------------- 8375BQ EOL --------------------------- ------------------------------- 8375BT EOL --------------------------- ------------------------------- 8381AQ EOL --------------------------- ------------------------------- 8381BT EOL --------------------------- ------------------------------- 8381BU PROD --------------------------- ------------------------------- 8391BQ PROD --------------------------- ------------------------------- 8391BU PROD --------------------------- ------------------------------- 43C97 Rev C --------------------------- ------------------------------- 1.12. Schedule 6 to the Agreement (Seller Contracts) shall be supplemented by adding the following purchase orders to such schedule: SUPPLIER CODE NAME AIC # PO QTY TOTAL $ DESCRIPTION - -------- --------- ----- -- --- ------------------- Seiko: Twister 400D 45034478 1000 pcs $1,550 Production,Samples Seiko: Twister 2 401A 45036225 125 pcs $18,540 NRE + Eng. Samples Seiko: Twister 2 401A 45038065 500 pcs $1,660 Eng. Samples TSMC: Fastcat2 5464A 45036210 42 Wfrs $150,385 NRE + Eng. Wafers TSMC: Fastcat2 5464A 45038055 6 Wfrs $10,476 Matrix Wafers TSMC: Fastcat2 5464A 45037541 384 Wfrs $558,720 Risk Buy Wafers on Hold TSMC: Fastcat2 5464A 45037779 192 Wfrs $279,360 Risk Buy Wafers on Hold Amkor Fastcat2 5464A 45037723 1300 pcs $2,015 Blind build Assembly Ipac Fastcat2 5464A 45037901 650 pcs $5,500 Blind build Assembly 3 4 1.13. Schedule 6 to the Agreement (Seller Contracts) shall be supplemented by adding the following agreement to such schedule: - -------------------------------------------------------------------------------- Manufacturers' Representative Agreement between J-Tek corporation and Adaptec, Inc. dated October 3, 1992 to the extent that such Manufacturers' Representative Agreement references PTS-related matters. - -------------------------------------------------------------------------------- 1.14. Schedule 13 to the Agreement (Certain Excluded Assets), under the heading "Third Party Tools", shall be deleted and replaced in its entirety by the following: 4 5 - --------------------------------------------------------------- ----------------------------- Cadence Tools Number of Adaptec Seats =============================================================== ============================= Verilog 45 - --------------------------------------------------------------- ----------------------------- Leapfrog 2 - --------------------------------------------------------------- ----------------------------- Pearl 1 - --------------------------------------------------------------- ----------------------------- VHDL Import 1 - --------------------------------------------------------------- ----------------------------- Silicon Ensemble 3 - --------------------------------------------------------------- ----------------------------- Cell 3 1 - --------------------------------------------------------------- ----------------------------- Verifault 3 - --------------------------------------------------------------- ----------------------------- Synopsys Tools Number of Adapted Seats =============================================================== ============================= LAI (logic modeling) - 180186 H-VLOG 0 (not in use by Adaptec) - --------------------------------------------------------------- ----------------------------- LAI (logic modeling) - TC514256 - VLOG 0 (not in use by Adaptec) - --------------------------------------------------------------- ----------------------------- Synthesis (Design Compiler, Verilog HDL, Design Analyzer) 9 - --------------------------------------------------------------- ----------------------------- Primetime 2 - --------------------------------------------------------------- ----------------------------- Test Compiler 5 - --------------------------------------------------------------- ----------------------------- VHDL Compiler 3 - --------------------------------------------------------------- ----------------------------- Behavior Compiler 1 - --------------------------------------------------------------- ----------------------------- Test Generator 1 - --------------------------------------------------------------- ----------------------------- Design Ware 1 - --------------------------------------------------------------- ----------------------------- Time Mill 3 - --------------------------------------------------------------- ----------------------------- Pathmill 2 - --------------------------------------------------------------- ----------------------------- Powermill 1 - --------------------------------------------------------------- ----------------------------- - -------------------------------- ------------------------------ ----------------------------- Vendor Tool Number of Adaptec Seats ================================ ============================== ============================= Chrysalis Formal Verification 1 (Chrysalis - equivalence check) - -------------------------------- ------------------------------ ----------------------------- Summit Vericov 2 - -------------------------------- ------------------------------ ----------------------------- Veritools Undertow 21 - -------------------------------- ------------------------------ ----------------------------- Adobe Framemaker 17 - -------------------------------- ------------------------------ ----------------------------- InterHDL Verilint 2 - -------------------------------- ------------------------------ ----------------------------- Mathworks Mathlab 5 - -------------------------------- ------------------------------ ----------------------------- SES SES Workbench Node lock license on server that can support four users - -------------------------------- ------------------------------ ----------------------------- Signal Scan (design 0 (not in use by Adaptec) accelerator) - -------------------------------- ------------------------------ ----------------------------- Smart model (TI 8990) 0 (not in use by Adaptec) - -------------------------------- ------------------------------ ----------------------------- Chronology Timing Designer 0 (not in use by Adaptec) - -------------------------------- ------------------------------ ----------------------------- Simucad Silos 2 - -------------------------------- ------------------------------ ----------------------------- Avant! Aquarius XL router 1 - -------------------------------- ------------------------------ ----------------------------- 5 6 1.15. Exhibit D to the Agreement (Form of License Agreement) shall be supplemented by supplementing Exhibit B (Licensed Patents) to the License Agreement with the following one patent: - ------------------------------- ---------------------- ---------------------- ---------------------- Title Status Inventors Adaptec Code - ------------------------------- ---------------------- ---------------------- ---------------------- Gated Clock Flip-Flops In Process Lance Flake PTS-087/A - ------------------------------- ---------------------- ---------------------- ---------------------- 1.16. Exhibit E to the Agreement (Form of Manufacturing Agreement) shall be amended by amending Section 6.2, Exhibit A (Products, Initial Prices and Yield) and Exhibit D (Engineering Support Services) to the Manufacturing Agreement as follows: Section 6.2: Replace the sentence beginning "For purposes of this Section, . . .," with the following: "For purposes of this Section, 'Yield' includes both wafer sort yield and final test yield." Exhibit A: Delete the following rows: - ------------------- ------------------ ----------------- Product Initial Price Yield - ------------------- ------------------ ----------------- 43C97(1) $3.87 - ------------------- ------------------ ----------------- 33C94 $2.02 - ------------------- ------------------ ----------------- Add the following columns for wafer sort yield and final test yield: - ------------------- --------------------- ------------------- Product Wafer Sort Yield Final Test Yield - ------------------- --------------------- ------------------- 9535AQ 85 97 - ------------------- --------------------- ------------------- 8391CU 90 96 - ------------------- --------------------- ------------------- 8391CQ 90 99 - ------------------- --------------------- ------------------- 8391BU 89 99 - ------------------- --------------------- ------------------- 8391BQ 89 99 - ------------------- --------------------- ------------------- 8387AM 83 99 - ------------------- --------------------- ------------------- 8381CQ 94 99 - ------------------- --------------------- ------------------- 8381BU 95 99 - ------------------- --------------------- ------------------- 8381BQ 95 99 - ------------------- --------------------- ------------------- 8375CT 92 99 - ------------------- --------------------- ------------------- 8375BQ 94 99 - ------------------- --------------------- ------------------- 8357AQ 78 89 - ------------------- --------------------- ------------------- 8353AQ 75 92 - ------------------- --------------------- ------------------- 8325BM 90 92 - ------------------- --------------------- ------------------- 8321CQ 88 98 - ------------------- --------------------- ------------------- 7166BT 96 99 - ------------------- --------------------- ------------------- 6 7 - ------------------- --------------------- ------------------- Product Wafer Sort Yield Final Test Yield - ------------------- --------------------- ------------------- 7166BQ 96 99 - ------------------- --------------------- ------------------- 5460CV 83 96 - ------------------- --------------------- ------------------- 5460CP 83 96 - ------------------- --------------------- ------------------- 4421AT 90 99 - ------------------- --------------------- ------------------- 4421AQ 90 99 - ------------------- --------------------- ------------------- 37C65CL-TR 78 97 - ------------------- --------------------- ------------------- 37C65CL 78 97 - ------------------- --------------------- ------------------- 33C93BY 76 94 - ------------------- --------------------- ------------------- 33C93BL 76 94 - ------------------- --------------------- ------------------- Add the following rows of additional products, and corresponding footnote 3: - ------------------- ------------------ ---------------------- ------------------------ Product Initial Price Wafer Sort Yield Final Test Yield - ------------------- ------------------ ---------------------- ------------------------ 8375BT $2.77 94 98 - ------------------- ------------------ ---------------------- ------------------------ 8210BT $2.21 77 97 - ------------------- ------------------ ---------------------- ------------------------ 43C97B(1) $3.87 85 84 - ------------------- ------------------ ---------------------- ------------------------ 43C97C(1) $3.87(3) - ------------------- ------------------ ---------------------- ------------------------ 37C65CY $1.34 78 97 - ------------------- ------------------ ---------------------- ------------------------ 33C94CB $2.02 94 98 - ------------------- ------------------ ---------------------- ------------------------ (3) indicates that part has not yet been qualified. Initial price shown is only an estimate, assuming that qualification proceeds as expected, and is subject to change. Actual initial price may be higher or lower, depending on actual qualification. The estimated initial price shown shall be replaced with the actual initial price once qualification has been completed. Exhibit D: Delete the phrase ", plus Fifty Two Thousand Dollars ($52,000) for tester time in support of quality/reliability" from the third paragraph of Section I of Exhibit D and add the following sentence immediately thereafter: "Seller shall provide quality/reliability support at the rate of One Hundred Twenty Dollars ($120) per hour." Add the following to Sections III, IV, and V of Exhibit D: III. Qualification of 43C97C and 5464B Labor provided by Adaptec for qualification of the 43C97C and 5464B which falls in the categories listed in item I above (Support services) shall be included in the applicable fee for item I, with no additional amounts due from STMicroelectronics to Adaptec for such labor. STMicroelectronics personnel shall be responsible for testing and characterization. All costs for materials incurred for the qualification of 43C97C and 5464B shall be paid directly by STMicroelectronics, Inc. or billed to STMicroelectronics by Adaptec at the time when 7 8 Adaptec incurs such expenses. Adapted shall conduct such qualification in accordance with its customary business practices. Such costs shall be reimbursed to Adapted at Adaptec's actual costs. Such costs include, without limitation, costs for masks, wafers, packaging, reliability boards, load boards, probe cards, and burn-in boards. Upon Adaptec's fulfillment of its obligation to manufacture the 43C97C and 5464B for STMicroelectronics hereunder, any such materials shall be transferred to STMicroelectronics. IV. Support of Fastcat 2 Adaptec will authorize TSMC to use one Adaptec tester and one prober to sort Fastcat 2 material for STMicroelectronics, Inc., for the period beginning upon closing and ending on April 15, 1999. V. Development of Software for SC212 Tester Commencing upon a mutually agreed upon date, Adaptec shall provide to STMicroelectronics, Inc., the services of one Adaptec employee, approved by STMicroelectronics, for the purpose of advising STMicroelectronics in the development of a software program for the SC212 tester. Such services will be provided during regular business hours and for a period of no more than five weeks. As consideration for such services, STMicroelectronics will pay Adaptec a fee of $5000.00 for each week of such services. SECTION 2. Reaffirmation. The Agreement, as supplemented and amended hereby, is in all respects reaffirmed and ratified, and is, and shall continue to be, in full force and effect. 8 9 IN WITNESS WHEREOF, Seller and Purchaser have caused this Amendment No. 1 to be executed as of the date first written above by their respective officers thereunto duly authorized. ADAPTEC, INC. ADAPTEC MFG. (S) PTE. LTD. STMICROELECTRONICS, INC. 9