28912 patents
Page 16 of 1446
Utility
Power Rail and Signal Line Arrangement In Integrated Circuits Having Stacked Transistors
4 Jan 24
A method includes fabricating a first-type active-region semiconductor, depositing a layer of dielectric material covering the first-type active-region semiconductor structure, and fabricating a second-type active-region semiconductor structure atop the layer of dielectric material.
Chih-Liang CHEN, Guo-Huei WU, Ching-Wei TSAI, Shang-Wen CHANG, Li-Chun TIEN
Filed: 18 Sep 23
Utility
Bonding Structure with Stress Buffer Zone and Method of Forming Same
4 Jan 24
A method includes depositing a first dielectric layer on a first substrate of a first device die, etching the first dielectric layer to form a trench, depositing a metallic material in the trench and on a top surface of the first dielectric layer, and performing a chemical mechanical polish (CMP) process to remove a portion of the metallic material from the top surface of the first dielectric layer to form a first metal pad.
SyuFong LI, Yu-Ping TSENG, Li-Hsien HUANG, Yao-Chun Chuang, Yinlung LU
Filed: 26 Jan 23
Utility
Chip Package Structure Having Molding Layer
4 Jan 24
A chip package structure is provided.
Shin-Puu JENG, Shuo-Mao CHEN, Feng-Cheng HSU
Filed: 28 Jul 23
Utility
Semiconductor Die Assembly Having a Polygonal Linking Die
4 Jan 24
A semiconductor die assembly is provided.
Jen-Yuan Chang
Filed: 3 Jul 22
Utility
Semiconductor Device Having Different Source/drain Junction Depths and Fabrication Method Thereof
4 Jan 24
Structures and formation methods of a semiconductor device are provided.
Ta-Chun LIN, Chun-Jun LIN, Kuo-Hua PAN, Jhon-Jhy LIAW
Filed: 29 Jun 22
Utility
Cmos Image Sensor
4 Jan 24
An image sensor includes a substrate having first and second surfaces opposite to each other, an image pixel area, and a black level calibration (BLC) area adjacent to the image pixel area.
Ming-Hsien YANG, Chun-Hao CHOU, Kuo-Cheng LEE, Chun-Wei CHIA, Chun-Liang LU, Wei-Chih WENG, Cheng-Hao CHIU
Filed: 24 Mar 23
Utility
Multi-Gate Transistor Structure
4 Jan 24
A semiconductor device according to the present disclosure includes a first channel member including a first channel portion and a first connection portion, a second channel member including a second channel portion and a second connection portion, a gate structure disposed around the first channel portion and the second channel portion, and an inner spacer feature disposed between the first connection portion and the second connection portion.
Jhon Jhy Liaw
Filed: 18 Sep 23
Utility
Semiconductor Device and Method
4 Jan 24
A semiconductor device and method of manufacture are provided which help to support contacts while material is removed to form air gaps.
Ching-Feng Fu, Guan-Ren Wang, Yun-Min Chang, Yu-Lien Huang
Filed: 29 Jun 23
Utility
Semiconductor Structure and Method for Forming the Same
4 Jan 24
A semiconductor structure includes a substrate, a multi-gate FET device disposed over the substrate, a first isolation disposed in the substrate, and a second isolation disposed in the substrate.
TZU-GING LIN, CHUN-LIANG LAI, YUN-CHEN WU, SHUN-HUI YANG
Filed: 1 Jul 22
Utility
Contact Structure for Stacked Multi-gate Device
4 Jan 24
A semiconductor device according to the present disclosure includes a stack of first channel members, a stack of second channel members disposed directly over the stack of first channel members, a bottom source/drain feature in contact with the stack of the first channel members, a separation layer disposed over the bottom source/drain feature, a top source/drain feature in contact with the stack of second channel members and disposed over the separation layer, and a frontside contact that extends through the top source/drain feature and the separation layer to be electrically coupled to the bottom source/drain feature.
Zhi-Chang Lin, Shih-Cheng Chen, Jung-Hung Chang, Chien Ning Yao, Kuo-Cheng Chiang, Chih-Hao Wang
Filed: 10 Jul 23
Utility
Power Clamp Device
4 Jan 24
The present disclosure provides a power clamp device.
PIN-HSIN CHANG, HSIN-YU CHEN, TZU-HENG CHANG
Filed: 3 Jul 22
Utility
Semiconductor Devices with Frontside and Backside Power Rails
4 Jan 24
A semiconductor device includes multiple transistors formed in a substrate, a frontside power rail disposed on a frontside of the substrate, and a backside power rail disposed on a backside of the substrate.
Yu-Xuan Huang, Ching-Wei Tsai, Yi-Hsun Chiu, Hou-Yu Chen
Filed: 26 Jan 23
Utility
High-throughput, precise semiconductor slurry blending tool
2 Jan 24
A slurry blending tool may include a blending tank to receive and blend one or more materials into a slurry, and at least one inlet pipe connected to the blending tank and to provide the one or more materials to the blending tank.
Chi-Wei Chiu, Yung-Long Chen, Bo-Zhang Chen, Chong-Cheng Su, Yu-Chun Chen, Ching-Jung Hsu, Chi-Tung Lai
Filed: 15 Jun 20
Utility
Shower head structure and plasma processing apparatus using the same
2 Jan 24
A shower head structure and a plasma processing apparatus are provided.
Huan-Chieh Chen, Jhih-Ren Lin, Tai-Pin Liu, Shyue-Shin Tsai, Keith Kuang-Kuo Koai
Filed: 23 Aug 19
Utility
Integrated circuit with biofets and fabrication thereof
2 Jan 24
An IC includes a source region and a drain region in a semiconductor layer.
Tung-Tsun Chen, Yi-Hsing Hsiao, Jui-Cheng Huang, Yu-Jie Huang
Filed: 31 Aug 20
Utility
Integrated circuit with BioFETs
2 Jan 24
An IC includes a source region and a drain region in a semiconductor layer.
Tung-Tsun Chen, Yi-Hsing Hsiao, Jui-Cheng Huang, Yu-Jie Huang
Filed: 9 Aug 22
Utility
Circuit, semiconductor device and method for parameter PSRR measurement
2 Jan 24
A circuit for parameter PSRR measurement includes a filter, a first regulator and a second regulator.
Amit Kundu, Jaw-Juinn Horng, Yi-Hsiang Wang
Filed: 16 Feb 22
Utility
Multi-tip optical coupling devices
2 Jan 24
An optical system with different optical coupling device configurations and a method of fabricating the same are disclosed.
Weiwei Song, Chan-Hong Chern, Chewn-Pu Jou, Stefan Rusu, Min-Hsiang Hsu
Filed: 13 Nov 20
Utility
Mask defect prevention
2 Jan 24
A photolithographic mask assembly according to the present disclosure accompanies a photolithographic mask.
Chi-Ta Lu, Chih-Chiang Tu, Cheng-Ming Lin, Ching-Yueh Chen, Wei-Chung Hu, Ting-Chang Hsu, Yu-Tung Chen
Filed: 30 Jun 22
Utility
Photomask including fiducial mark and method of making a semiconductor device using the photomask
2 Jan 24
A method of making a semiconductor device includes defining a pattern including a plurality of sub-patterns on the photomask in the pattern region based on the identifying information.
Hsin-Chang Lee, Ping-Hsun Lin, Chih-Cheng Lin, Chia-Jen Chen
Filed: 26 Jul 22