28912 patents
Page 3 of 1446
Utility
Integrated Circuit Package and Method
18 Jan 24
A device package includes a first die comprising a semiconductor substrate; an isolation layer on the semiconductor substrate, wherein the isolation layer is a first dielectric material; a first dummy via penetrating through the isolation layer and into the semiconductor substrate; a bonding layer on the isolation layer, wherein the bonding layer is a second dielectric material that has a smaller thermal conductivity than the first dielectric material; a first dummy pad within the bonding layer and on the first dummy via; a dummy die directly bonded to the bonding layer; a second die directly bonded to the bonding layer and to the first dummy pad; and a metal gap-fill material between the dummy die and the second die.
Sey-Ping Sun, Shih Wei Liang
Filed: 15 Jul 22
Utility
Electronic Device
18 Jan 24
An electronic device includes a substrate, a transistor, and a ring resonator.
Shih-Yuan CHEN, Jiun-Yun LI, Rui-Fu XU, Chiung-Yu CHEN, Ting-I YEH, Yu-Jui WU, Yao-Chun CHANG
Filed: 27 Sep 23
Utility
Semiconductor Device and Method
18 Jan 24
Some devices included a substrate; and a through via, including a plurality of scallops adjacent the through via in a first region and a plurality of scallops adjacent the through via in a second region, the of scallops having a first depth, the scallops having a greater depth.
Hsu-Lun Liu, Wen-Hsiung Lu, Ming-Da Cheng, Chen-En Yen, Cheng-Lung Yang, Kuanchih Huang
Filed: 31 Jul 23
Utility
Connector and Method for Forming the Same
18 Jan 24
A method includes forming a first connector and a second connector over a first wafer and a second wafer, respectively, in which each of the first and second connectors are formed by forming an opening in a dielectric layer; depositing a first metal layer in the opening, in which the first metal layer has a nano-twinned structure with (111) orientation; and depositing a second metal layer over the first metal layer, the second metal layer and the first metal layer being made of different materials, in which the second metal layer has a nano-twinned structure with (111) orientation; attaching the first wafer to the second wafer, such that that the second metal layer of the first connector on the first wafer is in contact with the second metal layer of the second connector on the second wafer; and performing a thermo-compression process to bond the first and second wafers.
Chih CHEN, Hsiang-Hou TSENG
Filed: 15 Jul 22
Utility
Contact Plugs for Semiconductor Device and Method of Forming Same
18 Jan 24
A semiconductor device and a method of forming the same are provided.
Mrunal A. Khaderbad, Yasutoshi Okuno, Sung-Li Wang, Pang-Yen Tsai, Shen-Nan Lee, Teng-Chun Tsai
Filed: 20 Jul 23
Utility
Methods of Fabricating the Same Die Stack Structure and Semiconductor Structure
18 Jan 24
A die stack structure including a first semiconductor die, a second semiconductor die, an insulating encapsulation and a redistribution circuit structure is provided.
Ming-Fa Chen, Chao-Wen Shih, Min-Chien Hsiao, Nien-Fang Wu, Sung-Feng Yeh, Tzuan-Horng Liu
Filed: 1 Aug 23
Utility
Semiconductor Package Having Multiple Substrates
18 Jan 24
A semiconductor device and method of manufacture is provided including a redistribution structure; a plurality of core substrates attached to the redistribution structure using conductive connectors, each core substrate of the plurality of core substrates comprising a plurality of conductive posts; and one or more molding layers encapsulating the plurality of core substrates, where the one or more molding layers extends along sidewalls of the plurality of core substrates, and where the one or more molding layers extends along a portion of a sidewall of each of the conductive posts.
Jiun Yi Wu, Chen-Hua Yu
Filed: 9 Aug 23
Utility
Semiconductor Device
18 Jan 24
A semiconductor device includes a first transistor disposed over a substrate, a second transistor disposed over the first transistor, and a conductive trace.
Pin-Dai SUE, Tzung-Yo HUNG, Jung-Hsuan CHEN, Ting-Wei CHIANG
Filed: 31 Jul 23
Utility
Multi-Liner TSV Structure and Method Forming Same
18 Jan 24
A method includes etching a substrate to form an opening, depositing a first dielectric liner extending into the opening, and depositing a second dielectric liner over the first dielectric liner.
Ming-Fa Chen, Chin-Shyh Wang, Chao-Wen Shih
Filed: 25 Jul 23
Utility
Backside Illuminated Image Sensor Device with Shielding Layer and Forming Method
18 Jan 24
An image sensor includes a pixel array, a dielectric layer, a plurality of first conductive shielding regions, and a plurality of second conductive shielding regions.
Volume CHIEN, Su-Hua CHANG, Chia-Yu WEI, Zen-Fong HUANG, Chi-Cherng JENG
Filed: 27 Jul 23
Utility
Symmetrical Substrate for Semiconductor Packaging
18 Jan 24
An integrated circuit package that includes symmetrical redistribution structures on either side of a core substrate is provided.
Jiun Yi Wu, Chen-Hua Yu
Filed: 31 Jul 23
Utility
Semiconductor Device and Manufacturing Method Thereof
18 Jan 24
A semiconductor device includes two source/drain features, a gate structure, a first contact plug, a second contact plug, a conductive line, and a nitride capping layer.
Lin-Yu Huang, Po-Chin Chang
Filed: 13 Jul 22
Utility
Semiconductor Package and Method of Forming Same
18 Jan 24
In an embodiment, a method for manufacturing a semiconductor device includes forming a redistribution structure on a carrier substrate, connecting a plurality of core substrates physically and electrically to the redistribution structure with a first anisotropic conductive film, the first anisotropic conductive film including a dielectric material and conductive particles, and pressing the plurality of core substrates and the redistribution structure together to form conductive paths between the plurality of core substrates and the redistribution structure with the conductive particles in the first anisotropic conductive film.
Jiun Yi Wu, Chen-Hua Yu, Chung-Shi Liu
Filed: 8 Aug 23
Utility
Semiconductor Device and Manufacturing Method Thereof
18 Jan 24
A method includes forming a dummy gate structure over a substrate; forming a source/drain structure over the substrate; replacing the dummy gate structure with a metal gate structure; forming a protection cap over the metal gate structure; forming a source/drain contact over the source/drain structure; performing a selective deposition process to form a first etch stop layer on the protection cap, in which the selective deposition process has a faster deposition rate on the protection cap than on the source/drain contact; depositing a second etch stop layer over the first etch stop layer the source/drain contact; etching the second etch stop layer to form an opening; and forming a via contact in the opening.
Li-Zhen YU, Chia-Hao CHANG, Cheng-Chi CHUANG, Yu-Ming LIN, Chih-Hao WANG
Filed: 14 Jul 23
Utility
Etch Stop Structure for Ic to Increase Stability and Endurance
18 Jan 24
Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a plurality of conductive contacts overlying a semiconductor substrate.
Yung-Chang Chang, Lee-Chuan Tseng, Chia-Hua Lin, Shu-Hui Su
Filed: 4 Jan 23
Utility
Semiconductor Device and Manufacturing Method Thereof
18 Jan 24
A semiconductor device includes a substrate, a semiconductor fin, a silicon layer, a gate structure, gate spacers, and source/drain structures.
Hsien-Wen WAN, Yi-Ting CHENG, Ming-Hwei HONG, Juei-Nai KWO, Bo-Yu YANG, Yu-Jie HONG
Filed: 14 Jul 23
Utility
a Metal-insulator-metal Device with Improved Performance
18 Jan 24
Various embodiments of the present disclosure are directed towards an integrated chip (IC).
Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Hsing-Chih Lin, Kuan-Hua Lin
Filed: 25 Jul 23
Utility
Field Effect Transistor with Negative Capacitance Dielectric Structures
18 Jan 24
The structure of a semiconductor device with negative capacitance (NC) dielectric structures and a method of fabricating the semiconductor device are disclosed.
Chansyun David YANG, Keh-Jeng CHANG, Chan-Lon YANG
Filed: 31 Jul 23
Utility
Semiconductor Structure and Method of Manufacturing Thereof
18 Jan 24
The semiconductor structure includes a first die structure including a first substrate, a first bonding dielectric disposed over the first substrate, and a first bonding pad surrounded by the first bonding dielectric; a second die structure including a second substrate, an isolation member extending into the second substrate, a second bonding dielectric bonded with the first bonding dielectric, and a second bonding pad surrounded by the second bonding dielectric and bonded with the first bonding pad; a dielectric member disposed over the second die structure; a conductive via extending through the dielectric member, the second substrate and the isolation member; and a conductive member disposed over the dielectric member and at least partially in contact with the conductive via, wherein a first interface between the conductive via and the conductive member is substantially coplanar with a second interface between the conductive member and the dielectric member.
HARRY-HAK-LAY CHUANG, WEI-CHENG WU, WEN-TUO HUANG, YU-LING HSU, PAI CHI CHOU, YU-CHUN CHANG, CHUNG-JEN HUANG
Filed: 14 Jul 22
Utility
Structure and Formation Method of Semiconductor Device with Power Rail
18 Jan 24
A semiconductor device structure and a formation method are provided.
Wen-Ting LAN, Lin-Yu HUANG, Shi-Ning JU, Kuo-Cheng CHIANG
Filed: 14 Jul 22