12220 patents
Utility
Package structure
16 Jan 24
In an embodiment, a package structure including an electro-optical circuit board, a fanout package disposed over the electro-optical circuit board is provided.
Chia-Lun Chang, Ching-Hua Hsieh, Cheng-Ting Chen, Hsiu-Jen Lin, Hsuan-Ting Kuo, Chia-Shen Cheng, Chih-Chiang Tsao
Filed: 1 Feb 23
Utility
Systems and methods for improved data access speed
16 Jan 24
Systems and methods are provided for a memory device.
Sanjeev Kumar Jain
Filed: 5 Jan 21
Utility
Methods for preparing void-free coatings for plasma treatment components
16 Jan 24
Methods for preparing a void-free protective coating are disclosed herein.
Shih-Tsung Chen, Tsung-Cheng Ho, Chien-Yu Wang, Yen-Shih Wang, Jiun-Rong Pai, Yeh-Chieh Wang
Filed: 8 Feb 22
Utility
Gate dielectric preserving gate cut process
16 Jan 24
Gate cutting techniques for integrated circuit devices, particularly for fin-like field effect transistor devices, are disclosed herein.
Shu-Yuan Ku, Chih-Ming Sun, Chun-Fai Cheng
Filed: 14 Oct 21
Utility
Overlay mark and method of making
16 Jan 24
An overlay mark includes a first feature extending in an X-direction, wherein the first feature is a first distance from a substrate.
Chen-Yu Chen, Ming-Feng Shieh, Ching-Yu Chang
Filed: 18 May 21
Utility
Shared well structure, layout, and method
16 Jan 24
An integrated circuit (IC) structure includes a continuous well including first through third well portions.
Yang Zhou, Liu Han, Qingchao Meng, XinYong Wang, ZeJian Cai
Filed: 16 Nov 21
Utility
Semiconductor device with gate isolation features and fabrication method of the same
16 Jan 24
Semiconductor structures and the manufacturing method thereof are disclosed.
Jung-Chien Cheng, Kuo-Cheng Chiang, Shi Ning Ju, Guan-Lin Chen, Jia-Chuan You, Chia-Hao Chang, Chih-Hao Wang, Kuan-Lun Cheng
Filed: 1 Sep 21
Utility
Epitaxial source/drain structures for multigate devices and methods of fabricating thereof
16 Jan 24
Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein.
Chen-Ming Lee, I-Wen Wu, Po-Yu Huang, Fu-Kai Yang, Mei-Yun Wang
Filed: 23 Jul 21
Utility
Duty-cycle corrector circuit
16 Jan 24
A duty-cycle corrector circuit produces a clock signal with a given duty cycle (e.g., fifty percent) or with a substantially given duty cycle.
WeiShuo Lin
Filed: 23 Dec 22
Utility
CMP polishing head design for improving removal rate uniformity
9 Jan 24
An apparatus for performing chemical mechanical polish on a wafer includes a polishing head that includes a retaining ring.
Te-Chien Hou, Ching-Hong Jiang, Kuo-Yin Lin, Ming-Shiuan She, Shen-Nan Lee, Teng-Chun Tsai, Yung-Cheng Lu
Filed: 19 Dec 22
Utility
Pellicle and method of using the same
9 Jan 24
A pellicle frame includes a check valve, wherein the check valve is configured to permit gas flow from an interior of the pellicle to an exterior of the pellicle.
Chue San Yoo, Hsin-Chang Lee, Pei-Cheng Hsu, Yun-Yue Lin
Filed: 18 Oct 22
Utility
Polymer layer in semiconductor device and method of manufacture
9 Jan 24
A method of manufacturing a semiconductor device includes applying a polymer mixture over a substrate, exposing and developing at least a portion of the polymer mixture to form a developed dielectric, and curing the developed dielectric to form a dielectric layer.
Sih-Hao Liao, Yu-Hsiang Hu, Hung-Jui Kuo, Chen-Hua Yu
Filed: 21 Sep 20
Utility
Base layout cell
9 Jan 24
Systems, methods and devices are provided, which can include an engineering change order (ECO) base.
Shang-Hsuan Chiu, Chih-Liang Chen, Hui-Zhong Zhuang, Chi-Yu Lu, Kuang-Ching Chang
Filed: 27 Aug 21
Utility
Inverted integrated circuit and method of forming the same
9 Jan 24
An integrated circuit includes a first and second active region, a first insulating region, and a first and second contact.
Pochun Wang, Yu-Jung Chang, Hui-Zhong Zhuang, Ting-Wei Chiang
Filed: 13 Dec 22
Utility
Embedded ferroelectric memory cell
9 Jan 24
The present disclosure relates to an integrated chip structure.
Tzu-Yu Chen, Kuo-Chi Tu, Wen-Ting Chu, Yong-Shiuan Tsair
Filed: 18 Jul 22
Utility
Compensation word line driver
9 Jan 24
Memory systems are provided.
Chia-Hao Pao, Shih-Hao Lin, Kian-Long Lim
Filed: 20 May 22
Utility
Latch type sense amplifier
9 Jan 24
A device is disclosed and includes an input stage circuit, a switching circuit, and a first latch circuit.
Hua-Hsin Yu, Hung-Jen Liao, Cheng-Hung Lee, Hau-Tai Shieh
Filed: 30 Aug 21
Utility
Back-side deep trench isolation structure for image sensor
9 Jan 24
The present disclosure relates to an image sensor having a photodiode surrounded by a back-side deep trench isolation (BDTI) structure, and an associated method of formation.
Yu-Hung Cheng, Chun-Tsung Kuo, Jiech-Fun Lu, Min-Ying Tsai, Chiao-Chun Hsu, Ching I Li
Filed: 11 Sep 20
Utility
Seed layer for ferroelectric memory device and manufacturing method thereof
9 Jan 24
A method includes: providing a bottom layer; forming a first transistor over a substrate; forming a bottom electrode over the transistor; depositing a first seed layer over the bottom electrode; performing a surface treatment on the first seed layer, wherein after the surface treatment the first seed layer includes at least one of a tetragonal crystal phase and an orthorhombic crystal phase; depositing a dielectric layer over the bottom layer adjacent to the first seed layer, the dielectric layer including an amorphous crystal phase; depositing an upper layer over the dielectric layer; performing a thermal operation on the dielectric layer to thereby convert the dielectric layer into a ferroelectric layer.
Chun-Chieh Lu, Sai-Hooi Yeong, Yu-Ming Lin
Filed: 30 Mar 22
Utility
Method and system of control of epitaxial growth
9 Jan 24
A method of semiconductor fabrication includes positioning a substrate on a susceptor in a chamber and growing an epitaxial feature on the substrate.
Winnie Victoria Wei-Ning Chen, Andrew Joseph Kelly
Filed: 21 Feb 22