2587 patents
Page 4 of 130
Utility
Hardware assisted memory profiling aggregator
2 Jan 24
An approach is provided for implementing memory profiling aggregation.
Sergey Blagodurov, Jinyoung Choi
Filed: 11 Jul 22
Utility
Live profile-driven cache aging policies
2 Jan 24
A technique for operating a cache is disclosed.
Christopher J. Brennan, Akshay Lahiry
Filed: 27 Jun 22
Utility
Cache miss predictor
2 Jan 24
Methods, devices, and systems for retrieving information based on cache miss prediction.
Ciji Isen, Paul J. Moyer
Filed: 30 Sep 21
Utility
Peripheral device protocols in confidential compute architectures
2 Jan 24
Restricting peripheral device protocols in confidential compute architectures, the method including: receiving a first address translation request from a peripheral device supporting a first protocol, wherein the first protocol supports cache coherency between the peripheral device and a processor cache; determining that a confidential compute architecture is enabled; and providing, in response to the first address translation request, a response including an indication to the peripheral device to not use the first protocol.
Philip Ng, Nippon Raval, David A. Kaplan, Donald P. Matthews, Jr.
Filed: 30 Dec 21
Utility
Bandwidth saving architecture for scalable video coding
2 Jan 24
A system configured to perform scalable video encoding is provided.
Lei Zhang, Ji Zhou, Zhen Chen, Min Yu
Filed: 16 Aug 21
Utility
Chassis as a common cooling solution for die packages
2 Jan 24
A computing device chassis for a common cooling solution for die packages comprising: a chassis base comprising: an internal cavity; a cooling element housed in the internal cavity; and one or more thermal interfaces to the cooling element.
Christopher M. Jaggers
Filed: 27 Sep 21
Utility
Graphics processing units with power management and latency reduction
2 Jan 24
The graphics processing unit (GPU) of a processing system transitions to a low-power state between frame rendering operations according to an inter-frame power off process, where GPU state information is stored on retention hardware.
Sreekanth Godey, Ashkan Hosseinzadeh Namin, Seunghun Jin, Teik-Chung Tan
Filed: 28 Dec 20
Utility
Frame replay for variable rate refresh display
2 Jan 24
A graphics processing unit (GPU) instructs a display control module to capture content and display captured content in response to the refresh rate of a display exceeding a frame generation rate of the GPU.
Anthony W L Koo, Syed Athar Hussain
Filed: 29 Mar 22
Utility
Cross field effect transistor (XFET) library architecture power routing
2 Jan 24
A system and method for efficiently creating layout for memory bit cells are described.
Richard T. Schultz
Filed: 29 Sep 21
Utility
Huffman Packing for Delta Compression
28 Dec 23
Huffman packing for delta compression is described.
Yaser ElSayed, Angel Serah, Jing Xie
Filed: 27 Jun 22
Utility
Noise Mitigation In Single-ended Links
28 Dec 23
An integrated circuit includes a first terminal for receiving a data signal, a second terminal for receiving an external reference voltage, a receiver, and a reference voltage generation circuit.
Ramon Mangaser, Karthik Gopalakrishnan, Andy Huei Chu, Pradeep Jayaraman
Filed: 7 Sep 23
Utility
Assigning Bit Budgets to Parallel Encoded Video Data
28 Dec 23
A technique for encoding video is provided.
Wei Gao, Gabor Sines, Ihab M. A. Amer, Crystal Yeong-Pian Sau, Feng Pan, Dong Liu
Filed: 22 Jun 22
Utility
Live Profile-driven Cache Aging Policies
28 Dec 23
A technique for operating a cache is disclosed.
Christopher J. Brennan, Akshay Lahiry
Filed: 27 Jun 22
Utility
Adaptive Thread Management for Heterogenous Computing Architectures
28 Dec 23
An apparatus and method for efficiently scheduling tasks in a dynamic manner to multiple cores that support a heterogeneous computing architecture.
Donny Yi, Indrani Paul, Ashwini Chandrashekhara Holla
Filed: 22 Jun 22
Utility
Technique to Enable Simultaneous Use of On-die Sram As Cache and Memory
28 Dec 23
A technique for operating a cache is disclosed.
Chintan S. Patel, Vydhyanathan Kalyanasundharam, Benjamin Tsien, Alexander J. Branover
Filed: 28 Jun 22
Utility
Allocation Control for Cache
28 Dec 23
A technique for operating a cache is disclosed.
Chintan S. Patel, Alexander J. Branover, Benjamin Tsien, Edgar Munoz, Vydhyanathan Kalyanasundharam
Filed: 28 Jun 22
Utility
Memory Controller with Pseudo-channel Support
28 Dec 23
A data processor accesses a memory having a first pseudo channel and a second pseudo channel.
Hideki Kanayama, YuBin Yao
Filed: 24 Jun 22
Utility
Enabling Accelerated Processing Units to Perform Dataflow Execution
28 Dec 23
Methods and systems are disclosed for performing dataflow execution by an accelerated processing unit (APU).
Johnathan Robert Alsop, Karthik Ramu Sangaiah, Anthony T. Gutierrez
Filed: 28 Jun 22
Utility
Channel Routing for Simultaneous Switching Outputs
28 Dec 23
A data processor is for accessing a memory having a first pseudo channel and a second pseudo channel.
Xuan Chen, Chih-Hua Hsu, Pradeep Jayaraman, Abdussalam Aburwein
Filed: 24 Jun 22
Utility
Smart Feedback Design for Verification
28 Dec 23
Techniques for implementing a smart feedback design for verification that reduce production and verification time by enabling a verification system to perform piecemeal verification of components of a circuit design selectively, accurately, and exhaustively before a final, overall circuit design is completed are disclosed.
David Akselrod
Filed: 22 Jun 22