10908 patents
Page 50 of 546
Utility
Enabling removal and reconstruction of flag operations in a processor
25 Jul 23
In one embodiment, a processor includes fetch logic to fetch instructions, decode logic to decode the fetched instructions, and execution logic to execute at least some of the instructions.
Zeev Sperber, Tomer Weiner, Amit Gradstein, Simon Rubanovich, Alex Gerber, Itai Ravid
Filed: 1 Jun 21
Utility
Work conserving, load balancing, and scheduling
25 Jul 23
A system and method are described for work conserving, load balancing, and scheduling by a network processor.
Joseph R. Hasting, William G. Burroughs
Filed: 30 Jan 20
Utility
Thread group scheduling for graphics processing
25 Jul 23
Embodiments are generally directed to thread group scheduling for graphics processing.
Ben Ashbaugh, Jonathan Pearce, Murali Ramadoss, Vikranth Vemulapalli, William B. Sadler, Sungye Kim, Marian Alin Petre
Filed: 3 Mar 22
Utility
Systems and methods for implementing an intelligent application program interface for an intelligent optimization platform
25 Jul 23
Systems and methods for implementing an application programming interface (API) that controls operations of a machine learning tuning service for tuning a machine learning model for improved accuracy and computational performance includes an API that is in control communication the tuning service that: executes a first API call function that includes an optimization work request that sets tuning parameters for tuning hyperparameters of a machine learning model; and initializes an operation of distinct tuning worker instances of the service that each execute distinct tuning tasks for tuning the hyperparameters; executes a second API call function that identifies raw values for the hyperparameters; and generates suggestions comprising proposed hyperparameter values selected from the plurality of raw values for each of the hyperparameters; and executes a third API call function that returns performance metrics relating to a real-world performance of the subscriber machine learning model executed with the proposed hyperparameter values.
Alexandra Johnson, Patrick Hayes, Scott Clark
Filed: 1 Nov 21
Utility
Data consistency and durability over distributed persistent memory systems
25 Jul 23
Examples described herein relates to a network interface apparatus that includes packet processing circuitry and a bus interface.
Ren Wang, Yifan Yuan, Yipeng Wang, Tsung-Yuan C. Tai, Tony Hurson
Filed: 5 Aug 20
Utility
Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format
25 Jul 23
Described herein is a graphics processing unit (GPU) comprising a first processing cluster to perform parallel processing operations, the parallel processing operations including a ray tracing operation and a matrix multiply operation; and a second processing cluster coupled to the first processing cluster, wherein the first processing cluster includes a floating-point unit to perform floating point operations, the floating-point unit is configured to process an instruction using a bfloat16 (BF16) format with a multiplier to multiply second and third source operands while an accumulator adds a first source operand with output from the multiplier.
Subramaniam Maiyuran, Shubra Marwaha, Ashutosh Garg, Supratim Pal, Jorge Parra, Chandra Gurram, Varghese George, Darin Starkey, Guei-Yuan Lueh
Filed: 27 May 22
Utility
Instruction execution that broadcasts and masks data values at different levels of granularity
25 Jul 23
An apparatus is described that includes an execution unit to execute a first instruction and a second instruction.
Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal, Bret L. Toll, Mark J. Charney
Filed: 22 Feb 22
Utility
Efficient convolution in machine learning environments
25 Jul 23
A mechanism is described for facilitating smart convolution in machine learning environments.
Dhawal Srivastava
Filed: 30 Dec 17
Utility
Methods and apparatus to improve data training of a machine learning model using a field programmable gate array
25 Jul 23
Methods, apparatus, systems, and articles of manufacture are disclosed to improve data training of a machine learning model using a field-programmable gate array (FPGA).
Kooi Chi Ooi, Min Suet Lim, Denica Larsen, Lady Nataly Pinilla Pico, Divya Vijayaraghavan
Filed: 28 Sep 18
Utility
Misuse index for explainable artificial intelligence in computing environments
25 Jul 23
A mechanism is described for facilitating misuse index for explainable artificial intelligence in computing environments, according to one embodiment.
Glen J. Anderson, Rajesh Poornachandran, Kshitij Doshi
Filed: 27 Feb 19
Utility
Apparatus and method for recompilation of quantum circuits to compensate for drift in a quantum computer
25 Jul 23
Apparatus and method for quantum drift compensation.
Justin Hogaboam, Adam Holmes
Filed: 30 Jun 18
Utility
Compressing dynamic range in images using darkness gamma transfer function
25 Jul 23
An example apparatus for compressing dynamic range includes an image receiver to receive an input image with a high dynamic range.
Dmitry Grilikhes
Filed: 23 Sep 19
Utility
Cloud based distributed single game calculation of shared computational work for multiple cloud gaming client devices
25 Jul 23
Systems, apparatuses, and methods may provide for technology to process graphics data in a virtual gaming environment.
Jonathan Kennedy, Gabor Liktor, Jeffery S. Boles, Slawomir Grajewski, Balaji Vembu, Travis T. Schluessler, Abhishek R. Appu, Ankur N. Shah, Joydeep Ray, Altug Koker, Jacek Kwiatkowski
Filed: 17 Sep 21
Utility
Position-based rendering apparatus and method for multi-die/GPU graphics processing
25 Jul 23
Position-based rendering apparatus and method for multi-die/GPU graphics processing.
Travis Schluessler, Zack Waters, Michael Apodaca, Daniel Johnston, Jason Surprise, Prasoonkumar Surti, Subramaniam Maiyuran, Peter Doyle, Saurabh Sharma, Ankur Shah, Murali Ramadoss
Filed: 28 Jul 22
Utility
Metal and spacer patterning for pitch division with multiple line widths and spaces
25 Jul 23
Metal spacer-based approaches for fabricating conductive lines/interconnects are described.
Kevin Lin, Charles Wallace
Filed: 20 Jun 18
Utility
Microelectronic package with underfilled sealant
25 Jul 23
Embodiments may relate to a method of forming a microelectronic package with an integrated heat spreader (IHS).
Taylor William Gaines, Ken Hackenberg, Frederick W. Atadana, Elah Bozorg-Grayeli
Filed: 8 Jul 19
Utility
Embedded component and methods of making the same
25 Jul 23
Various embodiments disclosed relate to a substrate for a semiconductor device.
Yi Elyn Xu, Bilal Khalaf, Dennis Sean Carr
Filed: 29 Mar 22
Utility
Ultraviolet (UV)-curable sealant in a microelectronic package
25 Jul 23
Embodiments may relate to a microelectronic package that includes an integrated heat spreader (IHS) coupled with a package substrate.
Taylor William Gaines, Ken Hackenberg, Elah Bozorg-Grayeli
Filed: 8 Jul 19
Utility
Integrated circuit structures with contoured interconnects
25 Jul 23
Integrated circuit (IC) structures include transistor devices with interconnect structures, e.g., a source contact, drain contact, and/or gate contact.
Ebubekir Dogan, Ramanan Ehamparam, Jiho Kang
Filed: 24 May 19
Utility
Semi-conductor package structure
25 Jul 23
Disclosed is a semiconductor package structure comprising a body, a plurality of first-layer, second-layer, third-layer and fourth-layer electrical contacts, wherein the first-layer, the second-layer, the third-layer and the fourth-layer electrical contacts are arranged sequentially from outside to inside on a bottom surface of the body in a matrix manner.
Xinhua Wang
Filed: 21 Feb 22