10908 patents
Page 52 of 546
Utility
Systems and methods for an accelerated tuning of hyperparameters of a model using a machine learning-based tuning service
18 Jul 23
A system and method for accelerated tuning of hyperparameters includes receiving a multi-task tuning work request for tuning hyperparameters of a model, wherein the multi-task tuning work request includes: a full tuning task for tuning hyperparameters, wherein the full tuning task includes a first set of tuning parameters governing a first tuning operation; a partial tuning task for tuning the hyperparameters of the model, wherein the partial tuning task includes a second distinct set of tuning parameters governing a second tuning operation; executing the first tuning operation and the second tuning operation; generating a first suggestion set and a second suggestion set of one or more proposed values for the hyperparameters based on the execution of the full tuning task and the partial tuning task; and setting the partial tuning task as a proxy for the full tuning task thereby accelerating a tuning of the hyperparameters of the model.
Michael McCourt, Ben Hsu, Patrick Hayes, Scott Clark
Filed: 15 Jul 19
Utility
Methods and apparatus for enhancing a binary weight neural network using a dependency tree
18 Jul 23
Methods and apparatus are disclosed for enhancing a binary weight neural network using a dependency tree.
Yiwen Guo, Anbang Yao, Hao Zhao, Ming Lu, Yurong Chen
Filed: 23 May 18
Utility
Apparatus and method for injecting spin echo micro-operations in a quantum processor
18 Jul 23
Apparatus and method for injected spin echo sequences in a quantum processor.
Xiang Zou, Justin Hogaboam
Filed: 27 Sep 18
Utility
Poisson distribution based approach for bootstrap aggregation in a random forest
18 Jul 23
Systems, apparatuses and methods may provide for technology that generates inclusion data in accordance with a Poisson distribution, wherein the inclusion data specifies a number of inclusions for each observation in a set of observations.
Mikhail Averbukh, Mohammad R. Haghighat
Filed: 16 Dec 19
Utility
Topology shader technology
18 Jul 23
Systems, apparatuses and methods may provide for technology that receives, at a topology shader in a graphics pipeline, an object description and generates, at the topology shader, a set of polygons based on the object description.
Hugues Labbe, Tomer Bar-On, Gabor Liktor, Andrew T. Lauritzen, John G. Gierach
Filed: 18 Nov 21
Utility
Methods for timed metadata priority rank signaling for point clouds
18 Jul 23
Embodiments herein provide techniques for signaling of priority information (e.g., priority ranking) and/or quality information in a timed metadata track associated with point cloud content.
Ozgur Oyman
Filed: 25 Sep 20
Utility
Semantic image segmentation using gated dense pyramid blocks
18 Jul 23
An example apparatus for semantic image segmentation includes a receiver to receive an image to be segmented.
Libin Wang, Anbang Yao, Jianguo Li, Yurong Chen
Filed: 25 Oct 21
Utility
Switched capacitor multiplier for compute in-memory applications
18 Jul 23
Systems, apparatuses and methods include technology that identifies whether a product of first and second digital numbers is associated with a positive value or a negative value.
Ashish Kumar, Srikanth Jatavallabhula
Filed: 23 Sep 21
Utility
Stacked die cavity package
18 Jul 23
An apparatus is provided which comprises: a plurality of dielectric layers forming a substrate, a plurality of first conductive contacts on a first surface of the substrate, a cavity in the first surface of the substrate defining a second surface parallel to the first surface, a plurality of second conductive contacts on the second surface of the substrate, one or more integrated circuit die(s) coupled with the second conductive contacts, and mold material at least partially covering the one or more integrated circuit die(s) and the first conductive contacts.
Mitul Modi, Robert L. Sankman, Debendra Mallik, Ravindranath V. Mahajan, Amruthavalli P. Alur, Yikang Deng, Eric J. Li
Filed: 13 Apr 22
Utility
Through mold interconnect drill feature
18 Jul 23
Embodiments disclosed herein include electronic packages.
Robert M. Nickerson, Rees Winters, Purushotham Kaushik Muthur Srinath
Filed: 26 Aug 19
Utility
Vias for package substrates
18 Jul 23
Embodiments herein describe techniques for a semiconductor device including a package substrate.
Andrew J. Brown, Luke Garner, Liwei Cheng, Lauren Link, Cheng Xu, Ying Wang, Bin Zou, Chong Zhang
Filed: 11 Jun 19
Utility
Variable in-plane signal to ground reference configurations
18 Jul 23
Embodiments disclosed herein include electronic packages with improved differential signaling architectures.
Andrew Collins, Arghya Sain
Filed: 27 Mar 19
Utility
Core fill to reduce dishing and metal pillar fill to increase metal density of interconnects
18 Jul 23
An integrated circuit structure comprises a first and second conductive structures formed in an interlayer dielectric (ILD) of a metallization stack over a substrate.
Kevin Lin
Filed: 25 Jun 18
Utility
Pitch translation architecture for semiconductor package including embedded interconnect bridge
18 Jul 23
Various embodiments relate to a semiconductor package.
Andrew Collins, Bharat P. Penmecha, Rajasekaran Swaminathan, Ram Viswanath
Filed: 26 Jan 22
Utility
Backside metallization (BSM) on stacked die packages and external silicon at wafer level, singulated die level, or stacked dies level
18 Jul 23
Embodiments include semiconductor packages and methods to form the semiconductor packages.
Chandra Mohan Jha, Prasad Ramanathan, Xavier F. Brun, Jimmin Yao, Mark Allen
Filed: 8 Oct 19
Utility
Self-aligned gate endcap (SAGE) architecture having local interconnects
18 Jul 23
Self-aligned gate endcap (SAGE) architectures having local interconnects, and methods of fabricating SAGE architectures having local interconnects, are described.
Sairam Subramanian, Walid M. Hafez, Sridhar Govindaraju, Kiran Chikkadi
Filed: 6 Mar 19
Utility
Isolation schemes for gate-all-around transistor devices
18 Jul 23
Isolation schemes for gate-all-around (GAA) transistor devices are provided herein Integrated circuit structures including increased transistor source/drain contact area using a sacrificial source/drain layer are provided herein.
Rishabh Mehandru, Stephen M. Cea, Biswajeet Guha, Tahir Ghani, William Hsu
Filed: 15 Apr 22
Utility
Power negotiation sequence to improve user experience and battery life
18 Jul 23
A power sequence in a power-delivery (PD) mechanism (interaction between host system components and a charger) and a firmware sequence during power contract negotiation reduces the host system power consumption at or below the pSnkStdby power limit to improve user experience and battery life.
Udaya Natarajan, Kannappan Rajaraman, Venkat Jayaraman
Filed: 17 Dec 20
Utility
Acoustic resonator structure
18 Jul 23
Modern RF front end filters feature acoustic resonators in a film bulk acoustic resonator (FBAR) structure.
Paul Fischer, Mark Radosavljevic, Sansaptak Dasgupta, Han Wui Then
Filed: 29 Dec 16
Utility
Differential source follower with current steering devices
18 Jul 23
Describe is a buffer which comprises: a differential source follower coupled to a first input and a second input; first and second current steering devices coupled to the differential source follower; and a current source coupled to the first and second current steering devices.
Yitzhak Elhanan Schifmann, Yoel Krupnik, Ariel Cohen
Filed: 11 Apr 22