12 patents
Utility
Programmable logic device with design for test functionality
19 Dec 23
A programmable logic device (PLD) supports scan testing of configurable logical blocks using scannable word line (WL) shift register (WLSR) chains to enable writes to configurable memory bits while scan test data is input via a scan chain comprising scannable bit line (BL) shift registers (BLSRs).
Ket Chong Yap, Chihhung Liao, Shieh Huan Yen
Filed: 5 Apr 22
Utility
Configuration latch for programmable logic device
19 Dec 23
An area efficient readable and resettable configuration memory latch is disclosed that maintains latch data integrity through read and write operations and includes a non-terminated inout bit line (BL).
Ket Chong Yap, Chihhung Liao
Filed: 17 Mar 22
Utility
Sectional Configuration for Programmable Logic Devices
2 Nov 23
A bit line (BL) may be coupled at a first end to a BL driver (BLD) and at a second end to a BL receiver (BLR).
Ket Chong YAP, Chihhung LIAO
Filed: 26 Apr 23
Utility
Area-efficient Configuration Latch for Programmable Logic Device
26 Oct 23
An area efficient input terminated readable and resettable configuration memory latch is disclosed.
Ket Chong Yap, Chihhung Liao, Shieh Huan Yen
Filed: 21 Apr 22
Utility
Programmable Logic Device with Design for Test Functionality
5 Oct 23
A programmable logic device (PLD) supports scan testing of configurable logical blocks using scannable word line (WL) shift register (WLSR) chains to enable writes to configurable memory bits while scan test data is input via a scan chain comprising scannable bit line (BL) shift registers (BLSRs).
Ket Chong Yap, Chihhung Liao, Shieh Huan Yen
Filed: 5 Apr 22
Utility
Configuration Latch for Programmable Logic Device
21 Sep 23
An area efficient readable and resettable configuration memory latch is disclosed that maintains latch data integrity through read and write operations and includes a non-terminated inout bit line (BL).
Ket Chong YAP, Chihhung Liao
Filed: 17 Mar 22
Utility
Sectional configuration for programmable logic devices
16 May 23
A bit line (BL) may be coupled at a first end to a BL driver (BLD) and at a second end to a BL receiver (BLR).
Ket Chong Yap, Chihhung Liao
Filed: 17 Mar 22
Utility
Smart road sensor
3 Aug 21
A road sensor has a housing, at least one sensor inside the housing, a processor inside the housing, the processor configured to execute instructions to cause the processor to: receive data from the at least one sensor; use machine learning to recognize conditions local to the sensor from the sensor data; and provide an output signal of the conditions.
Christopher B. Rogers
Filed: 13 Nov 19
Utility
Sensor hub batch packing
14 Sep 20
A sensor hub includes a bit packer that receives sensor data from a plurality of sensors and bit packs the sensor data so that the sensor ID, time stamp and each axis of the measured data is stored contiguously.
Rajasekaran Ramasubramanian, Dung Le
Filed: 23 May 16
Utility
Smart Road Sensor
13 May 20
A road sensor has a housing, at least one sensor inside the housing, a processor inside the housing, the processor configured to execute instructions to cause the processor to: receive data from the at least one sensor; use machine learning to recognize conditions local to the sensor from the sensor data; and provide an output signal of the conditions.
CHRISTOPHER B. ROGERS
Filed: 12 Nov 19
Utility
Heart Rate Monitor
5 Feb 20
A wrist worn heart rate monitor includes a photoplethysmogram (PPG) sensor and an inertial sensor.
Amir Abbas Emadzadeh
Filed: 13 Oct 19
Utility
Heart rate monitor
28 Oct 19
A wrist worn heart rate monitor includes a photoplethysmogram (PPG) sensor and an inertial sensor.
Amir Abbas Emadzadeh
Filed: 24 Feb 16
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