75 patents
Page 3 of 4
Utility
Current Mode Logic Driver and Transmission Driver Including the Same
10 Feb 22
A transmission driver includes a pulse generator and a current mode logic driver.
Gil Sung ROH, Sang Kyung KIM
Filed: 17 May 21
Utility
Semiconductor package with inner lead pattern group and method for manufacturing the semiconductor package
25 Jan 22
A semiconductor package includes a first metal interconnection disposed in a semiconductor chip, a first bump group configured to be connected to the first metal interconnection, a first inner lead pattern group configured to be connected to the first bump group, a second metal interconnection disposed in the semiconductor chip, a second bump group configured to be connected to the second metal interconnection; and a second inner lead pattern group configured to be connected to the second bump group, wherein a density of the first metal interconnection is greater than a density of the second metal interconnection, such that a first pitch of the first lead pattern group is greater than a second pitch of the second lead pattern group.
Jae Sik Choi, Do Young Kim, Jin Won Jeong, Hye Ji Lee
Filed: 5 Jul 19
Utility
Auto trimming device for oscillator and method of auto trimming device for oscillator
25 Jan 22
An auto trimming device includes an oscillator configured to generate an oscillator clock signal, a subtractor configured to receive an expected value for a target frequency and the oscillator clock signal, configured to output a difference value between the expected value and the oscillator clock signal, an index value selector configured to calculate a unit index value using the difference value and configured to detect and output a target index value from the unit index value, an index value register configured to output an oscillator trimming code corresponding to the target index value to the oscillator, and an embedded memory configured to store the oscillator trimming code as a target oscillator trimming code for the target frequency.
Yong Sup Lee, Gil Sung Roh
Filed: 1 Jul 20
Utility
Switching Control Circuit and Led Driving Circuit Using the Same
20 Jan 22
A switching control circuit configured to turn on a driving switching element by providing a gate signal to the driving switching element connected in series to an LED includes the switching control circuit configured to divide a PWM dimming signal into a normal PWM dimming section and a low PWM dimming section based on a timing selection signal, provide the gate signal of a first frequency to the driving switching element in the normal PWM dimming section, and provide the gate signal of a second frequency, greater than the first frequency, in the low PWM dimming section.
Jang Hyuck LEE, Hyun Mo AHN, Byoung Kwon AN
Filed: 12 Apr 21
Utility
Method for Forming Semiconductor Die and Semiconductor Device Thereof
6 Jan 22
A method for forming a semiconductor die, includes forming an interlayer dielectric layer on a substrate having a semiconductor die region, a seal-ring region, and a scribe line region, forming a metal pad and a test pad on the interlayer dielectric layer, forming a passivation dielectric layer on the interlayer dielectric layer, the metal pad, and the test pad, first etching the passivation dielectric layer and the interlayer dielectric layer existing between the seal-ring region and the scribe line region to a predetermined depth using a plasma etching process, second etching the passivation dielectric layer to expose the metal pad and the test pad, forming a bump on the metal pad, and dicing the substrate while removing the scribe line region by mechanical sawing.
Jin Won JEONG, Jang Hee LEE, Young Hun JUN, Jong Woon LEE, Jae Sik CHOI
Filed: 15 Apr 21
Utility
Current Generating Circuit and Oscillator Using Current Generating Circuit
6 Jan 22
A current generating circuit includes a current generator configured to supply a reference current, switches connected to the current generator, wherein one switch of the switches is selected and configured to operate, according to a switch selection signal, and one or more resistors, respectively connected to the switches, wherein a rate of current change according to a temperature change of the current generator is adjusted based on a temperature coefficient of resistance (TCR) of resistors connected to the one switch, according to adjustment of the one switch.
Jin Seop NOH, Hyoung Kyu KIM
Filed: 12 Apr 21
Utility
Panel Control Circuit and Display Device Including Panel Control Circuit
30 Dec 21
A panel control circuit for controlling a display panel comprising a first data line and a second data line includes a timing controller configured to generate input data comprising a first input data and a second input data, a first driving circuit configured to output a first video signal corresponding to the first input data into the first data line, and a second driving circuit configured to output a second video signal corresponding to the second input data into the second data line, wherein the timing controller is configured to turn off the second driving circuit based on a first deviation, a second deviation, or a third deviation.
Duk Min LEE
Filed: 19 Jan 21
Utility
Semiconductor Die Forming and Packaging Method Using Ultrashort Pulse Laser Micromachining
30 Dec 21
A semiconductor die forming method includes preparing a wafer, forming a low-k dielectric layer on the wafer, forming a metal pad on the low-k dielectric layer, forming a passivation layer on the metal pad, patterning the passivation layer, laser grooving the low-k dielectric layer using an ultrashort pulse laser, and cutting the wafer by mechanical sawing to form one or more semiconductor dies.
Jin Won JEONG, Jae Sik CHOI, Byeung Soo SONG
Filed: 15 Apr 21
Utility
Spread Spectrum Clock Generation Device and Method for Operating Spread Spectrum Clock Generation Device
30 Dec 21
A device includes a clock delay circuit configured to receive a reference clock signal and generate N delay clock signals, where N is a natural number greater than or equal to 2, by using the reference clock signal, and an output circuit configured to receive the N delay clock signals and output at least a portion of the delay clock signals from among the N delay clock signals as an output signal, wherein a phase delay of a delay clock signal that is output later in time from among the at least the portion of the delay clock signals is greater than or equal to a phase delay of a delay clock signal that is output earlier in time, and wherein a cycle of the output clock signal is longer than or equal to a cycle of the reference clock signal.
Dong Ho Kim, Gil Sung Roh
Filed: 11 Sep 20
Utility
Cascaded Display Driver Ic and Multi-vision Display Device Including the Same
25 Nov 21
A multi-vision display device includes a timing controller, a plurality of display panels, and a plurality of display driver integrated circuits (ICs).
Jung Hoon SUL, Myung Woo LEE, Seung Ryeol LEE, Duk Min LEE
Filed: 28 Dec 20
Utility
Panel Control Circuit and Display Device Including the Same
18 Nov 21
A panel control circuit configured to control a display panel includes a plurality of pixels.
Hyoung Kyu KIM, Yeon Kyoung PARK, Dae Young YOO
Filed: 28 Dec 20
Utility
Driving device of flat panel display and driving method thereof
9 Nov 21
A driving device of a flat panel display configured to receive an image signal and a clock signal includes a driving circuit configured to convert the image signal into pixel data and output the pixel data, a timing controller configured to generate and output a vertical synchronization signal, a horizontal synchronization signal, a source change enable signal, and a display enable signal using the image signal and the clock signal, an output buffer including an input terminal configured to receive the pixel data and an output terminal connected to the flat panel display, and a buffer controller connected to the timing controller and the output buffer and configured to control a bias current, applied to the output buffer, to be decreased by a value during a period.
Hyoung Kyu Kim, Yeon Kyoung Park, Dae Young Yoo
Filed: 7 Jun 19
Utility
Semiconductor device and manufacturing method thereof
9 Nov 21
A semiconductor device manufacturing method includes forming a first trench insulating film of a first depth in a substrate, forming at least one second trench insulating film that is spaced apart from the first trench insulating film and has a second depth that is greater than the first depth, forming a body region of a first conductivity type and a drift region of a second conductivity type in the substrate, forming a gate electrode overlapping the first trench insulating film, forming a source region in the body region and a drain region in the drift region, forming a silicide film on the drain region, and forming a non-silicide film between the first trench insulating film and the drain region, wherein the first trench insulating film overlaps the drift region and the gate electrode.
Guk Hwan Kim, Jin Yeong Son
Filed: 31 May 19
Utility
Semiconductor Device and Manufacturing Method of Semiconductor Device
7 Oct 21
A semiconductor device includes a source region, a drain region, and a gate insulating film formed on a substrate, a gate electrode formed on the gate insulating film, a first insulating film pattern formed to extend from the source region to a part of a top surface of the gate electrode, and a spacer formed on a side surface of the gate electrode in a direction of the drain region.
Guk Hwan KIM
Filed: 14 Jul 20
Utility
Semiconductor device having low Rdson and manufacturing method thereof
28 Sep 21
A semiconductor device includes a substrate, a first P-type well region and a second P-type well region disposed in the substrate, wherein the first P-type well region and the second P-type well region are spaced apart from each other, an N-type source region disposed in the substrate, wherein the N-type source region is disposed spaced apart from the second P-type well region, an N-type drain region disposed in the second P-type well region, an N-type LDD region disposed near the N-type drain region, and a gate insulating layer and a gate electrode on the substrate, wherein the gate electrode partially overlaps the second P-type well region.
Jae Hyung Jang, Jin Yeong Son, Hee Hwan Ji
Filed: 17 Apr 20
Utility
Gamma correction circuit, method for gamma correction, and display device including gamma correction circuit
28 Sep 21
A gamma correction circuit includes an input circuit configured to sequentially receive gamma control signals used for selecting gamma tap points from a control circuit through a single transmission line, and to output the received gamma control signals, and a voltage generator configured to select the gamma tap points based on the gamma control signals, and to generate gamma voltages according to the gamma tap points.
Myung Woo Lee, Hee Sung Yang
Filed: 27 Mar 20
Utility
Display driver with reduced power consumption and display device including the same
28 Sep 21
A display driver for driving a display panel includes a first driving circuit configured to output a first image signal to a first output pad, and a second driving circuit configured to output a second image signal to a second output pad; and the first driving circuit is further configured to output a reference image signal to the second driving circuit in response to a power down signal, and the second driving circuit is further configured to output the reference image signal output from the first driving circuit to the second output pad in response to the power down signal.
Seung Jo Shin, Hyung Pil Kim
Filed: 6 Sep 19
Utility
Fabrication Method of Semiconductor Die and Chip-on-plastic Packaging of Semiconductor Die
23 Sep 21
A semiconductor chip packaging method includes forming a bump on a wafer, forming a coating film covering the bump, laser grooving the wafer, plasma etching the wafer on which the laser grooving is performed, exposing the bump by removing the coating film covering the bump, fabricating a semiconductor die by performing mechanical sawing of the wafer, and packaging the semiconductor die.
Jin Won JEONG, Jae Sik CHOI, Byeung Soo SONG
Filed: 21 Jul 20
Utility
Power Semiconductor Device and Manufacturing Method Thereof
16 Sep 21
A method for manufacturing a power semiconductor device includes forming a drift region in a substrate, forming a trench in the drift region, forming a gate insulating layer in the trench, depositing a conductive material on the substrate, forming a gate electrode in the trench, forming a body region in the substrate, forming a highly doped source region in the body region, forming an insulating layer that covers the gate electrode, etching the insulating layer to open the body region, implanting a dopant into a portion of the body region to form a highly doped body contact region, so that the highly doped source region and the highly doped body contact region are alternately formed in the body region; and forming a source electrode on the highly doped body contact region and the highly doped source region.
Soo Chang KANG, Seong Jo HONG
Filed: 3 Jun 21
Utility
Reception apparatus with clock failure recovery and transmission system including the same
7 Sep 21
A reception apparatus communicating with a transmission apparatus with a clock lane and a data lane.
Su Hyun Kim, Sang Kyung Kim, Gil Sung Roh
Filed: 16 Oct 19