76 patents
Utility
Systems and Methods for Monitoring and Managing Memory Devices
4 Jan 24
The present disclosure is drawn to, among other things, a method of managing a memory device.
Syed M. ALAM, Jason JANESKY, Han Kyu LEE, Hamid ALMASI, Pedro SANCHEZ, Cristian P. MASGRAS, Iftekhar RAHMAN, Sumio IKEGAWA, Sanjeev AGGARWAL, Dimitri HOUSSAMEDDINE, Frederick Charles NEUMEYER
Filed: 15 Sep 23
Utility
Mram Device with Integrated Controller for Fpga System and Methods Therefor
14 Dec 23
A memory device includes a printed circuit board, a magnetoresistive random-access memory (MRAM) device coupled to the printed circuit board, a controller or control circuitry, wherein the controller or control circuitry is integrated into, embedded in, or otherwise incorporated into the MRAM device, and a field programmable gate array (FPGA) coupled to the printed circuit board and in communication with the controller or control circuitry.
Syed M. ALAM, Sanjeev AGGARWAL
Filed: 6 Jun 23
Utility
Magnetoresistive Stack/structure and Method of Manufacturing Same
14 Dec 23
A method of manufacturing a magnetoresistive stack/structure comprising (a) etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer, (b) depositing a first encapsulation layer on the sidewalls of the second magnetic region and over a surface of the dielectric layer, (c) thereafter: (i) etching the first encapsulation layer which is disposed over the dielectric layer using a first etch process, and (ii) etching re-deposited material using a second etch process, wherein, after such etching, a portion of the first encapsulation layer remains on the sidewalls of the second magnetic region, (d) etching (i) through the dielectric layer to form a tunnel barrier and provide sidewalls thereof and (ii) etching the first magnetic region to provide sidewalls thereof, and (e) depositing a second encapsulation layer on the sidewalls of the tunnel barrier and first magnetic region.
Sarin A. DESHPANDE, Kerry Joseph NAGEL, Chaitanya MUDIVARTHI, Sanjeev AGGARWAL
Filed: 25 Aug 23
Utility
Systems and Methods for nor Page Write Emulation Mode In Serial Stt-mram
30 Nov 23
The present disclosure is drawn to, among other things, a method of managing a magnetoresistive memory (MRAM) device.
Syed M. ALAM, Cristian P. MASGRAS
Filed: 9 Aug 23
Utility
Systems and Methods for Configuration of a Configuration Bit with a Value
23 Nov 23
The present disclosure is drawn to, among other things, a configuration bit including at least four resistive elements and a voltage amplifier.
Dimitri HOUSSAMEDDINE, Syed M. ALAM, Sanjeev AGGARWAL
Filed: 31 Jul 23
Utility
Magnetoresistive Stacks and Methods Therefor
23 Nov 23
A magnetically free region of magnetoresistive device includes at least a first ferromagnetic region and a second ferromagnetic region separated by a non-magnetic insertion region.
Jijun SUN, Jon SLAUGHTER, Renu WHIG
Filed: 27 Jul 23
Utility
In-plane Spin Orbit Torque Magnetoresistive Stack/structure and Methods Therefor
28 Sep 23
The present disclosure is drawn to, among other things, a magnetoresistive device and a magnetoresistive memory comprising a plurality of such magnetoresistive devices.
Sumio IKEGAWA, Han Kyu Lee, Sanjeev AGGARWAL, Jijun SUN, Syed M. ALAM, Tom ANDRE
Filed: 20 Mar 23
Utility
Persistent Xspi Stt-mram with Optional Erase Operation
21 Sep 23
The present disclosure is drawn to, among other things, a method for programming a memory device comprising a plurality of memory arrays.
Syed M. ALAM, Iftekhar RAHMAN, Pedro SANCHEZ
Filed: 9 Aug 22
Utility
Systems and Methods for a Storage Bit In an Artificial Neural Network
7 Sep 23
The present disclosure is drawn to, among other things, a device comprising input circuitry; weight operation circuitry electrically connected to the input circuitry; bias operation circuitry electrically connected to the weight operation circuitry; storage circuitry electrically connected to the weight operation circuitry and the bias operation circuitry; and activation function circuitry electrically connected to the bias operation circuitry, wherein at least the weight operation circuitry, the bias operation circuitry, and the storage circuitry are located on a same chip.
Syed M. ALAM, Dimitri HOUSSAMEDDINE, Sanjeev AGGARWAL
Filed: 23 Aug 22
Utility
Magnetoresistive Devices and Methods Therefor
17 Aug 23
A magnetoresistive stack may include a first electrically conductive material, a fixed region having a fixed magnetic state, a free region configured to have a first magnetic state and a second magnetic state, a dielectric layer disposed between the fixed region and the free region, a spacer region, and a cap layer disposed between the spacer region and the free region.
Sumio IKEGAWA, Jijun SUN, Monika ARORA
Filed: 11 Feb 22
Utility
Magnetic Field Sensor with Increased SNR
3 Aug 23
Various means for improvement in signal-to-noise ratio (SNR) for a magnetic field sensor are disclosed for low power and high resolution magnetic sensing.
Phillip G. MATHER, Anuraag MOHAN
Filed: 11 Apr 23
Utility
Midpoint Sensing Reference Generation for Stt-mram
3 Aug 23
The present disclosure is drawn to a magnetoresistive device including an array of memory cells arranged in rows and columns, each memory cell comprising a magnetic tunnel junction, each row comprising a word line, and each column comprising a bit line; a column select device that selects a bit line.
Syed M. ALAM, Yaojun ZHANG, Frederick NEUMEYER
Filed: 10 Apr 23
Utility
Systems and Methods for Dual Standby Modes In Memory
27 Jul 23
1.
Syed M. ALAM
Filed: 24 Mar 23
Utility
Systems and Methods for Dual Standby Modes In Memory
20 Jul 23
The present disclosure is drawn to, among other things, a method for accessing memory using dual standby modes, the method including receiving a first standby mode indication selecting a first standby mode from a first standby mode or a second standby mode, configuring a read bias system to provide a read bias voltage and a write bias system to provide approximately no voltage, or any voltage outside the necessary range for write operation, based on the first standby mode, receiving a second standby mode indication selecting the second standby mode, and configuring the read bias system to provide at least the read bias voltage and the write bias system to provide a write bias voltage based on the second standby mode, the read bias voltage being lower than the write bias voltage.
Syed M. ALAM
Filed: 24 Mar 23
Utility
Method of Integration of a Magnetoresistive Structure
13 Jul 23
A method of manufacturing one or more interconnects to magnetoresistive structure comprising (i) depositing a first conductive material in a via; (2) etching the first conductive material wherein, after etching the first conductive material a portion of the first conductive material remains in the via, (3) partially filling the via by depositing a second conductive material in the via and directly on the first conductive material in the via; (4) depositing a first electrode material in the via and directly on the second conductive material in the via; (5) polishing a first surface of the first electrode material wherein, after polishing, the first electrode material is (i) on the second conductive material in the via and (ii) over the portion of the first conductive material remaining in the via; and (6) forming a magnetoresistive structure over the first electrode material.
Kerry Joseph NAGEL, Kenneth SMITH, Moazzem HOSSAIN, Sanjeev AGGARWAL
Filed: 16 Mar 23
Utility
Magnetoresistive Stack with Seed Region and Method of Manufacturing the Same
13 Jul 23
A magnetoresistive stack/structure and method of manufacturing same comprising wherein the stack/structure includes a seed region, a fixed magnetic region disposed on and in contact with the seed region, a dielectric layer(s) disposed on the fixed magnetic region and a free magnetic region disposed on the dielectric layer(s).
Jijun SUN, Sanjeev AGGARWAL, Han-Jong CHIA, Jon M. SLAUGHTER, Renu WHIG
Filed: 17 Mar 23
Utility
Methods of Forming Magnetoresistive Devices and Integrated Circuits
30 Mar 23
Magnetoresistive device architectures and methods for manufacturing are presented that facilitate integration of process steps associated with forming such devices into standard process flows used for surrounding logic/circuitry.
Kerry Joseph NAGEL, Sanjeev AGGARWAL, Thomas ANDRE, Sarin A. DESHPANDE
Filed: 11 Oct 22
Utility
Magnetoresistive Devices and Methods of Fabricating Magnetoresistive Devices
23 Feb 23
A method of manufacturing a magnetoresistive device may comprise forming a first magnetic region, an intermediate region, and a second magnetic region of a magnetoresistive stack above a via; removing at least a portion of the second magnetic region using a first etch; removing at least a portion of the intermediate region and at least a portion of the first magnetic region using a second etch; removing at least a portion of material redeposited on the magnetoresistive stack using a third etch; and rendering at least a portion of the redeposited material remaining on the magnetoresistive stack electrically non-conductive.
Sanjeev AGGARWAL, SHIMON, Kerry Joseph NAGEL
Filed: 11 Oct 22
Utility
Magnetoresistive Devices and Methods Therefor
16 Feb 23
A magnetoresistive stack may include: a fixed region having a fixed magnetic state, a spacer region, a first dielectric layer and a second dielectric layer, where both the first dielectric layer and the second dielectric layer are between the fixed region and the spacer region, and a free region between the first dielectric layer and the second dielectric layer.
Jijun SUN
Filed: 9 Aug 21
Utility
Systems and Methods for Configuration of a Configuration Bit with a Value
26 Jan 23
The present disclosure is drawn to, among other things, a configuration bit including at least four resistive elements and a voltage amplifier.
Dimitri HOUSSAMEDDINE, Syed M. ALAM, Sanjeev AGGARWAL
Filed: 28 Feb 22