739 patents
Utility
Self-Ordering Fast Fourier Transform For Single Instruction Multiple Data Engines
18 Jan 24
A method for self-ordering Fast Fourier Transform for Single Instruction Multiple Data engines includes performing a butterfly operation on a first input vector and a second input vector to generate a first output vector and a second output vector, wherein the first input vector, the second input vector, the first output vector and the second output vector are each comprised of complex numbers, and a first order of the complex numbers of the first output vector is non-linear and a second order of the complex numbers of the second output vector is non-linear.
Jayakrishnan Cheriyath Mundarath, Kevin Bruce Traylor
Filed: 14 Jul 22
Utility
System on Chip Isolation Control Architecture
18 Jan 24
A method and apparatus are disclosed for a multi-processor system on a chip which includes at least a first execution domain processor that is configured to run a first execution domain by accessing one or more system-on-chip resources; a first control point processor that is physically and programmatically independent from the first execution domain processor and that is configured to generate a first runtime isolation control data stream for controlling access to the one or more system-on-chip resources by the first execution domain; and an access control circuit connected between the first execution domain processor and the one or more system-on-chip resources and configured to provide a dynamic runtime isolation barrier in response to the first runtime isolation control data stream, thereby controlling access to the one or more system-on-chip resources by the first execution domain.
Roderick Lee Dorris, Daniel Antoniu Stroe, John David Round
Filed: 18 Jul 22
Utility
System on Chip Isolation with Address Virtualization Control
18 Jan 24
A method and apparatus are disclosed for a multi-processor system on a chip which includes at least a first execution domain processor that is configured to run a first execution domain by accessing one or more system-on-chip (SoC) resources using virtual addresses; a control point processor that is physically and programmatically independent from the first execution domain processor and that is configured to generate a runtime virtualization isolation control data stream for controlling access to the SoC resources by identifying at least a first SoC resource that the first execution domain is allowed to access; and an access control circuit connected between the first execution domain and the SoC resources and configured to provide, in response to the runtime virtualization isolation control data stream, a dynamic runtime virtualization isolation barrier which maps a virtual address for the first SoC resource to a physical address for the first SoC resource.
Roderick Lee Dorris, Daniel Antoniu Stroe
Filed: 18 Jul 22
Utility
Control Channel Architecture
18 Jan 24
A method and apparatus are disclosed for a multi-processor SoC which includes an execution domain processor for running an execution domain; a control point processor that is physically and programmatically independent from the execution domain processor and configured to generate control data for controlling access by the execution domain to one or more SoC resources by identifying at least a first SoC resource that the execution domain is allowed to access; and an access control circuit connected between the execution domain and the SoC resources and including a programmable front end which is connected to receive the control data from the control point processor, and a signals-based back end which is configured to provide a dynamic runtime isolation barrier in response to the control data, thereby controlling access to the one or more system-on-chip resources by the execution domain.
Roderick Lee Dorris
Filed: 18 Jul 22
Utility
System on Chip with Pre-Exemption Interrupts for Partition Execution Control
18 Jan 24
A method and apparatus are disclosed for a multi-processor SoC which includes an execution domain processor for running an execution domain which hosts independent software partitions by accessing, for each software partition, one or more SoC resources; a control point processor that generates control data with pre-emption vectors for controlling access to the SoC resources by identifying at least a first SoC resource that each software partition is allowed to access; and an access control circuit connected between the execution domain and the SoC resources and configured to provide, in response to the control data, a dynamic runtime isolation barrier which enables the execution domain processor to switch between software partitions in response to a pre-emption interrupt trigger by fetching partition instructions from a corresponding pre-emption interrupt vector address in memory that is associated with the pre-emption interrupt trigger.
Roderick Lee Dorris, John David Round, Michael Andrew Fischer
Filed: 18 Jul 22
Utility
Multi-Partition, Multi-Domain System-on-Chip JTAG Debug Control Architecture and Method
18 Jan 24
A method and apparatus are disclosed for a multi-processor SoC which includes an execution domain processor for running an execution domain which hosts n partitions by accessing, for each partition, one or more SoC resources; a control point processor that generates control data with n JTAG debug enable signals corresponding to the n partitions for controlling access to the SoC resources by identifying at least a first SoC resource that each partition is allowed to access; and an access control circuit connected between the execution domain and the SoC resources and configured to provide, in response to the control data, a dynamic runtime isolation barrier which allows access by the JTAG debugging tool to only a specified partition running on the execution domain which has a JTAG debug enable signal set to a first active value and prevents access to the other n-1 partitions running on the execution domain, and for the partition under debug (debug signal set to a first active value), the dynamic runtime isolation barrier can be configured to block debugger access to selected memory regions accessible by the partition under debug.
Roderick Lee Dorris
Filed: 18 Jul 22
Utility
Analog Amplitude Pre-distortion Circuit and Method
18 Jan 24
An analog amplitude pre-distortion circuit and method.
Gerben Willem de Jong, Jozef Reinerus Maria Bergervoet, Mark Pieter van der Heijden, Bilal Elkassir
Filed: 7 Jul 23
Utility
Analog Amplitude Pre-distortion Circuit and Method
18 Jan 24
An analog amplitude pre-distortion circuit and method.
Gerben Willem de Jong, Jozef Reinerus Maria Bergervoet, Mark Pieter van der Heijden
Filed: 7 Jul 23
Utility
Non-long Range Preamble Design for Long Range Wireless Packet and Methods for Processing the Preamble
18 Jan 24
A method and system comprises receiving a signal over an air interface.
Hongyuan Zhang, Hari Ram Balakrishnan, Sudhir Srinivasa
Filed: 6 Jul 23
Utility
CorrectedMulti-link Device Association and Reassociation
18 Jan 24
One example discloses a first-device: wherein the first-device is configured to be coupled to a second-device over an IEEE 802.11 communications link; and wherein the first-device is configured to, store a current setup between the first-device and the second-device; identify a unique identifier of the second-device; transmit a request frame to a third-device; wherein at least one of the second-device and third-device is a multi-link-device (MLD); wherein the request frame is configured to request an association with the third-device and includes the unique identifier of the second-device; receive a response frame from the third-device; and wherein the response frame includes an indication that request was successful.
Young Hoon Kwon, Liwen Chu, Hongyuan Zhang, Huiling Lou
Filed: 22 Feb 21
Utility
Power Supply Handling for Multiple Package Configurations
18 Jan 24
A packaged die including a first and a second power supply pad configured to provide a first and a second power supply voltage, respectively, and circuitry powered by the first power supply voltage.
Kumar Abhishek, Sandeep Singh Jasrotia
Filed: 24 Oct 22
Utility
Open-circuit detector
16 Jan 24
One example discloses an open-circuit detector, comprising: a first current source configured to inject a current at an output of a closed-loop circuit; a detector configured to monitor a voltage of the closed-loop circuit; wherein the detector is configured to indicate whether the voltage monitored exceeds a predetermined threshold voltage; a controller configured to regulate the current injected by the first current source; wherein the controller is configured to set an open-circuit flag if the current injected caused the voltage to exceed the predetermined threshold voltage.
Mohammed Mansri, Mahraj Sivaraj, Hamada Ahmed, Tarek Hakam
Filed: 31 May 22
Utility
Substrate pad and die pillar design modifications to enable extreme fine pitch flip chip (FC) joints
16 Jan 24
An electronic component includes a device die and a substrate.
Kabir Mirpuri
Filed: 29 Apr 21
Utility
Semiconductor device with directing structure and method therefor
16 Jan 24
A semiconductor device having a radiating element and a directing structure is provided.
Robert Joseph Wenzel, Michael B. Vincent
Filed: 17 May 21
Utility
Optocoupler circuit with level shifter
16 Jan 24
In an optocoupler circuit, a first direction path, which transmits signals from a first to a second terminal, includes a first level shifter, a second level shifter, and a first optocoupler.
YangTao Cheng, Kai Zhu
Filed: 7 Apr 22
Utility
Network node firmware update
16 Jan 24
An apparatus and method for updating the firmware version in a network node is described.
Bruno De Smet, Gatien Chapon
Filed: 2 Oct 20
Utility
Testing of On-chip Analog-mixed Signal Circuits Using On-chip Memory
11 Jan 24
Analog-to-digital converters (ADCs) of an integrated circuit includes a first set of ADCs and second set of ADCs in which the ADCs of the first set are of a different type than the ADCs of the second set.
Kumar Abhishek, Xiankun Jin, Mark Lehmann
Filed: 5 Jul 22
Utility
Device Package Substrate Structure and Method Therefor
11 Jan 24
A semiconductor device substrate is provided.
Chee Seng Foong, Trent Uehling, Tingdong Zhou
Filed: 18 Sep 23
Utility
Closed Loop Power Loss Control of Wireless Power Transmission, and Methods for Wireless Power Transmission
11 Jan 24
Power transmission associated with wireless charging of a battery of an electronic device or powering of the electronic device comprises determining a power loss associated with transmitting a power signal having a transmitted power from the wireless power transmitter to a wireless power receiver.
Huan Mao, Dechang Wang, Li Wang
Filed: 1 Aug 22
Utility
Method and System for Range Extension In Wireless Communication
11 Jan 24
A method and system for generating an extended range (ER) physical layer protocol data unit (PPDU) is disclosed.
Hari Ram Balakrishnan, Sudhir Srinivasa, Rui Cao, Hongyuan Zhang, Sergey Timofeev, Rong Zhang, Priyanka Bansal
Filed: 6 Jul 23