8534 patents
Page 2 of 427
Utility
Local memory use for perspective transform engine
16 Jan 24
An integrated circuit includes: a local memory; and a first processing circuit coupled to the local memory.
Mihir Narendra Mody, Niraj Nandan, Rajasekhar Reddy Allu
Filed: 20 Dec 22
Utility
Real-time arbitration of shared resources in a multi-master communication and control system
16 Jan 24
A spinlock circuit connected to one or more first processors through one or more broadside interfaces.
Thomas Anton Leyrer, William Cronin Wallace
Filed: 29 May 19
Utility
Surround view
16 Jan 24
A system on a chip (SoC) includes a digital signal processor (DSP) and a graphics processing unit (GPU) coupled to the DSP.
Shashank Dabral, Vikram Appia, Hemant Hariyani, Lucas Weaver
Filed: 29 Jun 22
Utility
Radar processing chain for frequency-modulated continuous wave radar systems
16 Jan 24
Systems and methods are provided for a radar processing chain for frequency-modulated continuous wave radar systems.
June Chul Roh
Filed: 14 Sep 21
Utility
Position or velocity control system and method
16 Jan 24
In described examples of methods and control systems to control a position and/or velocity of a machine, control circuitry is coupled to receive and dither a control signal, and to compute a control output value according to the dithered control signal and a control function.
Rajan Lakshmi Narasimha, David Patrick Magee
Filed: 11 Jan 21
Utility
Frame-based, low power interfaces between devices with different I/O signals
16 Jan 24
High-speed data communication devices, e.g., repeaters, interfacing between a host and a peripheral operate such that high-speed components except for a host-side squelch detector are set or maintained in a deactivated state during an idle period of a micro frame.
Mustafa Ulvi Erdogan, Suzanne Mary Vining, Bharath Kumar Singareddy, Douglas Edward Wente
Filed: 25 May 21
Utility
Non-active chirp dithering in FMCW radar
16 Jan 24
A non-transitory computer-readable storage device stores machine instructions which, when executed by a processor, cause the processor to determine a chirp period Tc for radar chirps in a radar frame.
Shankar Ram Narayana Moorthy, Karthik Subburaj, Shailesh Joshi, Piyush Soni
Filed: 11 Oct 21
Utility
Wireless protocol for battery management
16 Jan 24
A vehicular battery management system (BMS) comprises a battery controller, a set of battery cells, a primary network node coupled to the battery controller, and a secondary network node coupled to the set of battery cells.
Ariton E. Xhafa, Torbjørn Sørby, Minghua Fu, Jesus Daniel Torres Bardales, Ramanuja Vedantham, Alexis Justine Burnight, Archanaa Santhana Krishnan
Filed: 16 Apr 21
Utility
Transistor device with buffered drain
16 Jan 24
A semiconductor device includes a source region.
Henry Litzmann Edwards
Filed: 29 Sep 21
Utility
Motor controller including resonant controllers
16 Jan 24
A motor controller integrated circuit (IC) includes a storage device containing software.
Prasad Kulkarni
Filed: 25 Jun 21
Utility
Digital predistortion calibration
16 Jan 24
A method for digital predistortion (DPD) calibration in a wireless communication device is provided that includes transmitting, by transmission circuitry of the wireless communication device, a plurality of pulses, where each pulse corresponds to an amplitude step in a pattern of amplitude steps, where the amplitude steps are separated by silence gaps, receiving each pulse in receiver circuitry of the wireless communication device, generating, by an accumulator component of the wireless communication device, an accumulated sample for each pulse based on a plurality of samples output by the receiver circuitry for the pulse, and computing, by a processor of the wireless communication device, amplitude dependent gain (AM/AM) and amplitude dependent phase shift (AM/PM) values for each accumulated sample.
Raghu Ganesan, Harish Kumar Ramesh, John Roshan Samuel Chandran, Lakshmi Bala Krishna Manoja Vinnakota
Filed: 14 Oct 21
Utility
Silicon nitride metal layer covers
16 Jan 24
In some examples, a semiconductor package includes a semiconductor die; a passivation layer abutting a device side of the semiconductor die; a first conductive layer abutting the device side of the semiconductor die; a second conductive layer abutting the first conductive layer and the passivation layer; a silicon nitride layer abutting the second conductive layer, the silicon nitride layer having a thickness ranging from 300 Angstroms to 3000 Angstroms; and a third conductive layer coupled to the second conductive layer at a gap in the silicon nitride layer, the third conductive layer configured to receive a solder ball.
Jonathan Andrew Montoya, Salvatore Franks Pavone
Filed: 30 Apr 21
Utility
Flip chip package assembly
16 Jan 24
In a described example, an apparatus includes: a semiconductor die having a device side surface; bond pads on the semiconductor die on the device side surface; post connects having a proximate end on the bond pads and extending from the bond pads to a distal end, the diameter of the post connects at the proximate end being the same as the diameter of the post connects at the distal end; polyimide material covering sides of the post connects and covering at least a portion of the bond pads; and solder bumps on the distal end of the post connects.
Katleen Fajardo Timbol, Salvatore Frank Pavone, Rafael Jose Lizares Guevara
Filed: 30 Sep 21
Utility
Scalable prediction type coding
16 Jan 24
A method for encoding a video sequence is provided that includes signaling in the compressed bit stream that a subset of a plurality of partitioning modes is used for inter-prediction of a portion of the video sequence, using only the subset of partitioning modes for prediction of the portion of the video sequence, and entropy encoding partitioning mode syntax elements corresponding to the portion of the video sequence, wherein at least one partitioning mode syntax element is binarized according to a pre-determined binarization corresponding to the subset of partitioning modes, wherein the pre-determined binarization differs from a pre-determined binarization for the least one partitioning mode syntax element that would be used if the plurality of partitioning modes is used for inter-prediction.
Minhua Zhou
Filed: 9 Sep 20
Utility
Monitoring circuit for photovoltaic module
16 Jan 24
A monitoring circuit for a photovoltaic module includes a measurement conditioning circuit, a microcontroller circuit, and a transmitter circuit.
Timothy Patrick Pauletti, Suheng Chen
Filed: 29 Apr 22
Utility
Compensation of thermally induced voltage errors
16 Jan 24
Described embodiments include an integrated circuit for temperature gradient compensation of a bandgap voltage.
Sandeep Shylaja Krishnan, Akshay Yashwant Jadhav, Tallam Vishwanath
Filed: 28 Jan 22
Utility
Differential input circuits with input voltage protection
16 Jan 24
Differential input circuits employ protection transistors and feedback paths to limit the differential voltage applied to input transistors.
Vadim Valerievich Ivanov, Srinivas Kumar Pulijala
Filed: 28 Jul 21
Utility
Low power bi-directional architecture for current output digital to analog conversion
16 Jan 24
An example apparatus includes: a voltage-to-current circuit including a first input terminal, a first output terminal and a second output terminal, a subtraction circuit including a second input terminal and a third output terminal, the second input terminal coupled to the second output terminal, a first driver circuit including a third input terminal and a fourth output terminal, the third input terminal coupled to the third output terminal, and a second driver circuit including a fourth input terminal and a fifth output terminal, the fourth input terminal coupled to the first output terminal, the fifth output coupled to the fourth output terminal.
Atul Kumar Agrawal, Kanak Chandra Das
Filed: 30 Sep 21
Utility
DFE implementation for wireline applications
16 Jan 24
Disclosed embodiments include a decision feedback equalizer (DFE) comprising an N-bit parallel input adapted to be coupled to a communication channel and configured to receive consecutive communication symbols, a first DFE path including a first path input configured to receive communication symbols, and a first adder having a first adder input coupled to the first path input.
Raghu Ganesan, Kalpesh Rajai
Filed: 29 Apr 22
Utility
Stackable timer
16 Jan 24
An system-on-a-chip (“SoC”) is provided.
Rakesh Hariharan, Sumantha Manoor Madhyastha
Filed: 1 Sep 21