Exhibit 99.4
|
investor meeting
2015 SANTA CLARA
Diane Bryant
Senior Vice President & General Manager
Data Center Group
|
2 |
|
Key Messages
Adoption of cloud computing growing and transforming all segments
Non-CPU products contribute meaningful growth
Fundamental growth drivers remain strong
*Forecast is based on current expectations given available information and is subject to change without notice
Source: Intel
|
3 |
|
Data Center Growth Forecast
*Forecast is based on current expectations given available information and is subject to change without notice
Source: Intel
CONTRIBUTION OF NON-CPU
GROWTH BY END-USER SEGMENT
2015-2019*
$B
CPU
NON-CPU
CPU
12% CAGR
DATA CENTER
15% CAGR
>20%
CAGR
COMMS SP
CLOUD SP
>20%
CAGR
GOVERNMENT,
ACADEMIA, SCIENCE
~20%
CAGR
ENTERPRISE IT
<5%
CAGR
|
4 |
|
Accelerated technology
adoption
TAM expansion
ASP uplift
Adoption of Cloud Computing Across All Segments
CLOUD COMPUTING GROWTH
ENTERPRISE
CLOUDS
HPC
CLOUDS
NETWORK
CLOUDS
100%
ENTERPRISE IT
COMMS SPS
CLOUD SPS
G.A.S.
**Forecast is based on current expectations given available information and is subject to change without notice
Source: Intel
|
5 |
|
Diversification of the Cloud Service Provider Market
1. Super 7= Alibaba, Amazon, Baidu, Facebook, Google, Microsoft, Tencent
2. Source: IDC: Worldwide SaaS and Cloud Software 2015-2019 Forecast and 2014 Vendor Shares, August 2015
3. Source: ‘14-15 YoYgrowth based on top 41 CSPs in each region. Technology Business Research, Public Cloud Benchmark 2Q15
2015 Revenue2
“AS A SERVICE” DYNAMICS
100%
10%
16%
74%
IaaS
SaaS
PaaS
Europe &
Middle East
57%
Asia
55%
Americas46%
GROWTH OUTSIDE U.S.
1H’15 YoYGrowth3
Cloud SP CPU Units
CLOUD SP GROWTH
Units
*Forecast is based on current expectations given available information and is subject to change without notice
Source: Intel
Next 50
~40% CAGR
Super 71
~30% CAGR
|
6 |
|
Cloud Service Provider Dynamics
SUPER 7 VALUE PERFORMANCE
5 |
|
have
custom
CPUs
5 |
|
are in the
Early Ship
Program
4 |
|
will
sample
FPGAs
in Q1’16
Broad
interest in
3D XPoint™
2 |
|
have
sampled
Silicon
Photonics
2015 Volume1
CONSUMER VS.BUSINESS
1.Source: Intel estimate
7 |
|
bought
higher
price point
SKUs
|
7 |
|
Cloud Enables new Enterprise Growth
ENABLING NEW BUSINESSES2
Improving first responder
safetythrough cloud
connected devices
Delivering an end-to-end
connected car lifestylethrough BMW Connected Drive
Other names and brands may be claimed as the property of others
PRIVATE CLOUD INVESTMENTS
2015-2016
Expected workload destination1
1.Source: 451 Research, Voice of the Enterprise Cloud Computing Advisory Report Q4 2014 Survey of 1200 Senior IT leaders / decision makers(N=370)
2.Source: Company reports
Making industrial analytics
applications easier to deploy
with Predix Cloud
Enabling precision farming
through cloud-based
analytics
|
8 |
|
Cloud Enables new Enterprise Growth
ENABLING NEW BUSINESSES2
Improving first responder
safetythrough cloud
connected devices
Delivering an end-to-end
connected car lifestylethrough BMW Connected Drive
Other names and brands may be claimed as the property of others
PRIVATE CLOUD INVESTMENTS
2015-2016
Expected workload destination1
1.Source: 451 Research, Voice of the Enterprise Cloud Computing Advisory Report Q4 2014 Survey of 1200 Senior IT leaders / decision makers(N=370)
2.Source: Company reports
Making industrial analytics
applications easier to deploy
with Predix Cloud
Enabling precision farming
through cloud-based
analytics
|
9
Network Moves to Cloud
VALUE TO SERVICE PROVIDERS
Other names and brands may be claimed as the property of others
NETWORK OPPORTUNITY1
1.Source: IHS, Company reports, Intel analysis
2.Source: Intel
3.Source: China Mobile CRAN whitepaperSource: IHS, company reports, Intel analysis
4.Source: Telefonica UNICA, http://saladeprensa.telefonica.com/documentos/UNICA__20140224.pdf
2014: $17B TAM
NFV DEPLOYED ON INTEL ARCHITECTURE
FPGA
ASIC
CPU
ASSP
Altera
Intel
~$1.2B
Growing at
~10
X
t
he market
5%
MSS
7%
MSS
9.5%
MSS
$
IA MSS2
97% reduction in time to deployment
of new services4
-Telefonica
50% OpEx& power reduction3
-China Mobile
*Forecast is based on current expectations given available information and is subject to change without notice
100%
|
10
Delivering New Products
INTEL SILICON PHOTONICS
Samples shipping
Longest reach at 2 km
Highest port density
>20% cost advantage
ONLY ON-DIE INTEGRATED LASER
INTEL OMNI-PATH ARCHITECTURE
1stproduction in December
10% performance advantage1
60% lower system power2
20% system cost savings3
LEADERSHIP VS. INFINIBANDEDR
1. Tests performed on Intel® Xeon® Processor E5-2697v3 dual-socket servers with 2133 MHz DDR4 memory. Intel® Turbo Boost Technology enabled and Intel® Hyper-Threading Technology disabled. Intel OPA: Open MPI 1.10.0 with PSM2. Pre-production Intel Corporation Device 24f0 –Series 100 HFI ASIC, Series 100 Edge
Switch –48 port. IOU Non-posted Prefetchdisabled in BIOS. EDR: Open MPI 1.8-mellanox released with hpcx-v1.3.336-icc-MLNX_OFED_LINUX-3.0-1.0.1-redhat6.6-x86_64.tbz. MellanoxEDR ConnectX-4 Single Port Rev 3 MCX455A HCA. MellanoxSB7700 -36 Port EDR Infinibandswitch. 17% claim: HPCC 1.4.3 Random
order ring latency. 16 nodes, 28 MPI ranks per node. 7% message rate claim: Ohio State Micro Benchmarks v. 4.4.1. osu_mbw_mr28 MPI ranks per node, 8 byte message.
2. Assumes 750-node cluster, and number of switch chips required is based on a full bisectional bandwidth (FBB) Fat-Tree configuration. Intel® OPA uses one fully-populated 768-port director switch, and MellanoxEDR solution uses a combination of director switches and edge switches. Mellanoxpower data based on
MellanoxCS7500 Director Switch, MellanoxSB7700/SB7790 Edge switch, and MellanoxConnectX-4 VPI adapter card installation documentation posted on www.mellanox.com as of November 1, 2015. Intel OPA power databased on product briefs posted on www.intel.com as of November 16, 2015.
3. Assumes a 750-node cluster, and number of switch chips required is based on a full bisectional bandwidth (FBB) Fat-Tree configuration. Intel® OPA uses one fully-populated 768-port director switch, and MellanoxEDR solution uses a combination of 648-port director switches and 36-port edge switches. Mellanoxcomponent pricing from www.kernelsoftware.com, with prices as of November 3, 2015. Compute node pricing based on Dell PowerEdgeR730 server from www.dell.com, with prices as of May 26, 2015. Intel® OPA pricing based on estimated reseller pricing based onprojected Intel MSRP pricing at time of launch.
4. Intel estimate
5. IDC, Intel estimate. Includes HPC deployments only.
6. Source: Gartner, IHS, Intel analysis
$1.6B TAM
20205
3D XPOINT™DIMMS
Sampling in 2016
4X memory capacity
1/2the cost of DRAM
NEW CLASS OF NON-VOLATILE MEMORY
$34B TAM
20206
Other names and brands may be claimed as the property of others
$5B TAM
20204
|
11
Delivering New Products
INTEL SILICON PHOTONICS
Samples shipping
Longest reach at 2 km
Highest port density
>20% cost advantage
ONLY ON-DIE INTEGRATED LASER
INTEL OMNI-PATH ARCHITECTURE
1stproduction in December
10% performance advantage1
60% lower system power2
20% system cost savings3
LEADERSHIP VS. INFINIBANDEDR
1. Tests performed on Intel® Xeon® Processor E5-2697v3 dual-socket servers with 2133 MHz DDR4 memory. Intel® Turbo Boost Technology enabled and Intel® Hyper-Threading Technology disabled. Intel OPA: Open MPI 1.10.0 with PSM2. Pre-production Intel Corporation Device 24f0 –Series 100 HFI ASIC, Series 100 Edge
Switch –48 port. IOU Non-posted Prefetchdisabled in BIOS. EDR: Open MPI 1.8-mellanox released with hpcx-v1.3.336-icc-MLNX_OFED_LINUX-3.0-1.0.1-redhat6.6-x86_64.tbz. MellanoxEDR ConnectX-4 Single Port Rev 3 MCX455A HCA. MellanoxSB7700 -36 Port EDR Infinibandswitch. 17% claim: HPCC 1.4.3 Random
order ring latency. 16 nodes, 28 MPI ranks per node. 7% message rate claim: Ohio State Micro Benchmarks v. 4.4.1. osu_mbw_mr28 MPI ranks per node, 8 byte message.
2. Assumes 750-node cluster, and number of switch chips required is based on a full bisectional bandwidth (FBB) Fat-Tree configuration. Intel® OPA uses one fully-populated 768-port director switch, and MellanoxEDR solution uses a combination of director switches and edge switches. Mellanoxpower data based on
MellanoxCS7500 Director Switch, MellanoxSB7700/SB7790 Edge switch, and MellanoxConnectX-4 VPI adapter card installation documentation posted on www.mellanox.com as of November 1, 2015. Intel OPA power databased on product briefs posted on www.intel.com as of November 16, 2015.
3. Assumes a 750-node cluster, and number of switch chips required is based on a full bisectional bandwidth (FBB) Fat-Tree configuration. Intel® OPA uses one fully-populated 768-port director switch, and MellanoxEDR solution uses a combination of 648-port director switches and 36-port edge switches. Mellanoxcomponent pricing from www.kernelsoftware.com, with prices as of November 3, 2015. Compute node pricing based on Dell PowerEdgeR730 server from www.dell.com, with prices as of May 26, 2015. Intel® OPA pricing based on estimated reseller pricing based onprojected Intel MSRP pricing at time of launch.
4. Intel estimate
5. IDC, Intel estimate. Includes HPC deployments only.
6. Source: Gartner, IHS, Intel analysis
$1.6B TAM
20205
3D XPOINT™DIMMS
Sampling in 2016
4X memory capacity
1/2the cost of DRAM
NEW CLASS OF NON-VOLATILE MEMORY
$34B TAM
20206
Other names and brands may be claimed as the property of others
$5B TAM
20204
|
12
Delivering New Products
INTEL SILICON PHOTONICS
Samples shipping
Longest reach at 2 km
Highest port density
>20% cost advantage
ONLY ON-DIE INTEGRATED LASER
INTEL OMNI-PATH ARCHITECTURE
1stproduction in December
10% performance advantage1
60% lower system power2
20% system cost savings3
LEADERSHIP VS. INFINIBANDEDR
1. Tests performed on Intel® Xeon® Processor E5-2697v3 dual-socket servers with 2133 MHz DDR4 memory. Intel® Turbo Boost Technology enabled and Intel® Hyper-Threading Technology disabled. Intel OPA: Open MPI 1.10.0 with PSM2. Pre-production Intel Corporation Device 24f0 –Series 100 HFI ASIC, Series 100 Edge
Switch –48 port. IOU Non-posted Prefetchdisabled in BIOS. EDR: Open MPI 1.8-mellanox released with hpcx-v1.3.336-icc-MLNX_OFED_LINUX-3.0-1.0.1-redhat6.6-x86_64.tbz. MellanoxEDR ConnectX-4 Single Port Rev 3 MCX455A HCA. MellanoxSB7700 -36 Port EDR Infinibandswitch. 17% claim: HPCC 1.4.3 Random
order ring latency. 16 nodes, 28 MPI ranks per node. 7% message rate claim: Ohio State Micro Benchmarks v. 4.4.1. osu_mbw_mr28 MPI ranks per node, 8 byte message.
2. Assumes 750-node cluster, and number of switch chips required is based on a full bisectional bandwidth (FBB) Fat-Tree configuration. Intel® OPA uses one fully-populated 768-port director switch, and MellanoxEDR solution uses a combination of director switches and edge switches. Mellanoxpower data based on
MellanoxCS7500 Director Switch, MellanoxSB7700/SB7790 Edge switch, and MellanoxConnectX-4 VPI adapter card installation documentation posted on www.mellanox.com as of November 1, 2015. Intel OPA power databased on product briefs posted on www.intel.com as of November 16, 2015.
3. Assumes a 750-node cluster, and number of switch chips required is based on a full bisectional bandwidth (FBB) Fat-Tree configuration. Intel® OPA uses one fully-populated 768-port director switch, and MellanoxEDR solution uses a combination of 648-port director switches and 36-port edge switches. Mellanoxcomponent pricing from www.kernelsoftware.com, with prices as of November 3, 2015. Compute node pricing based on Dell PowerEdgeR730 server from www.dell.com, with prices as of May 26, 2015. Intel® OPA pricing based on estimated reseller pricing based onprojected Intel MSRP pricing at time of launch.
4. Intel estimate
5. IDC, Intel estimate. Includes HPC deployments only.
6. Source: Gartner, IHS, Intel analysis
$1.6B TAM
20205
3D XPOINT™DIMMS
Sampling in 2016
4X memory capacity
1/2the cost of DRAM
NEW CLASS OF NON-VOLATILE MEMORY
$34B TAM
20206
Other names and brands may be claimed as the property of others
$5B TAM
20204
|
13
Summary
Adoption of cloud computing growing and
transforming all segments
Non-CPU products contribute meaningful
growth
Fundamental growth drivers remain strong
GROWTH BY END-USER SEGMENT
2015-2019*
>20%
CAGR
COMMS SP
CLOUD SP
>20%
CAGR
GOVERNMENT,
ACADEMIA, SCIENCE
~20%
CAGR
ENTERPRISE IT
<5%
CAGR
*Forecast is based on current expectations given available information and is subject to change without notice
Source: Intel
|
investor meeting
2015 SANTA CLARA
|
Risk Factors
The statements in this presentation and other commentary that refer to future plans and expectations are forward-looking statements that involve a number of risks and uncertainties. Words such as “anticipates,” “expects,” “intends,” “goals,” “plans,” “believes,” “seeks,” “estimates,” “continues,” “may,” “will,” “should,” and variations of such words and similar expressions are intended to identify such forward-looking statements. Statements that refer to or are based on projections, uncertain events or assumptions also identify forward-looking statements. Many factors could affect Intel’s actual results, and variances from Intel’s current expectations regarding such factors could cause actual results to differ materially from those expressed in these forward-looking statements. Intel presently considers the following to be important factors that could cause actual results to differ materially from the company’s expectations. Demand for Intel’s products is highly variable and could differ from expectations due to factors including changes in business and economic conditions; consumer confidence or income levels; the introduction, availability and market acceptance of Intel’s products, products used together with Intel products and competitors’ products; competitive and pricing pressures, including actions taken by competitors; supply constraints and other disruptions affecting customers; changes in customer order patterns including order cancellations; and changes in the level of inventory at customers. Intel’s gross margin percentage could vary significantly from expectations based on capacity utilization; variations in inventory valuation, including variations related to the timing of qualifying products for sale; changes in revenue levels; segment product mix; the timing and execution of the manufacturing ramp and associated costs; excess or obsolete inventory; changes in unit costs; defects or disruptions in the supply of materials or resources; and product manufacturing quality/yields. Variations in gross margin may also be caused by the timing of Intel product introductions and related expenses, including marketing expenses, and Intel’s ability to respond quickly to technological developments and to introduce new products or incorporate new features into existing products, which may result in restructuring and asset impairment charges. Intel’s results could be affected by adverse economic, social, political and physical/infrastructure conditions in countries where Intel, its customers or its suppliers operate, including military conflict and other security risks, natural disasters, infrastructure disruptions, health concerns and fluctuations in currency exchange rates. Results may also be affected by the formal or informal imposition by countries of new or revised export and/or import and doing-business regulations, which could be changed without prior notice. Intel operates in highly competitive industries and its operations have high costs that are either fixed or difficult to reduce in the short term. The amount, timing and execution of Intel’s stock repurchase program could be affected by changes in Intel’s priorities for the use of cash, such as operational spending, capital spending, acquisitions, and as a result of changes to Intel’s cash flows or changes in tax laws. Product defects or errata (deviations from published specifications) may adversely impact our expenses, revenues and reputation. Intel’s results could be affected by litigation or regulatory matters involving intellectual property, stockholder, consumer, antitrust, disclosure and other issues. An unfavorable ruling could include monetary damages or an injunction prohibiting Intel from manufacturing or selling one or more products, precluding particular business practices, impacting Intel’s ability to design its products, or requiring other remedies such as compulsory licensing of intellectual property. Intel’s results may be affected by the timing of closing of acquisitions, divestitures and other significant transactions. In addition, risks associated with our pending acquisition of Altera are described in the “Forward Looking Statements” paragraph of Intel’s press release dated June 1, 2015, which risk factors are incorporated by reference herein. A detailed discussion of these and other factors that could affect Intel’s results is included in Intel’s SEC filings, including the company’s most recent reports on Form 10-Q, Form 10-K and earnings release.