Exhibit 99.2
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Double Patterning Jo Finders and Skip Miller 15 October 2008, Veldhoven |
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Spacer DPT | SPCR 32nm Litho DPT - LELE | LDPT 32nm Litho DPT - LFLE | LDPF 32nm Double exposure | DE 38 nm SiON /HM Etch Clean Strip Film Etch Metrology Develop Expose Top coat Resist BARC SiON / SiC Hard Mask Device film Si Single exposure | SE 45nm Options to print below immersion single exposure limit Cost, complexity and cycle time *Wafer does not leave the exposure system between the two exposures *Wafer preferably does not leave the litho cell between the exposures *Wafer leaves litho cell for etch between the exposures |
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Strong DPT EUV Light DPT EUV Jan-02 Jan-03 Jan-04 Jan-05 Jan-06 Jan-07 Jan-08 Jan-09 Jan-10 Jan-11 Jan-12 Jan-13 Jan-14 Year of Production Start* Resolution, "Shrink" [nm] 100 80 60 Logic NAND Flash DRAM 30 20 50 *Process development 1.5 ~ 2 years in advance (updated 12/07) 200 Double patterning will bridge the gap between single exposure 193 nm immersion and EUV AT:1200 XT:1400 XT:1900i Next EUV ASML product Introduction 40 XT:1700i |
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Litho cost per layer: estimates for 32 nm & 22 nm Single exposure schemes more cost effective Reticle cost based on 5000 wafers / mask usage Fixed Operating Source Chemical CVD Metrology Etch Clean Reticle 0.0 0.5 1.0 1.5 2.0 2.5 3.0 45 nm 32 nm 32 nm 32 nm 22 nm 22 nm 22 nm ArFi 193 nm Spacer DPT 193 nm Litho DPT EUV 193 nm Spacer DPT 193 nm Litho DPT EUV Normalized litho cost per layer |
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Litho double patterning data flow, 2 masks/exposures Model based stitching Model OPC 1st Mask 2nd Mask Final contour Processing Litho/etch Exposure 1 Exposure 2 Combined patterns from exposures ? frequency double Target layout Coloring Split 1 Split 2 |
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Spacer with overlay-friendly layout to enjoy overlay advantage from the self-aligned process Slight device enlargement to meet overlay requirement Slight gap enlargement to meet overlay requirement |
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Double patterning requires better and more lithography Litho exposure equipment parameter as percentage of CD Single exposure Litho double patterning Spacer double patterning ^CD 7% 3.5% 3% Overlay (depending on DFM) 20% 7% 7-20%* #mask steps 1 2 2-3 # process steps relative to single exposure 1 2 3-4 Application 2D, All 2D, All 1D, Mainly Memory * Depending on the amount of "Design For Manufacturing" effort |
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Conclusion To make DPT profitable ASML has to provide machines with higher productivity and better accuracy (overlay and CD) The new NXT platform is prepared to support our customers to meet DPT challenges for the coming nodes |
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