46 patents
Page 3 of 3
Utility
Fast Phase Frequency Detector
16 Sep 20
Disclosed a fast phase frequency detector, comprising: two fast pulsed-latches, a NAND gate and an adjustable delay circuit.
Pengzhan ZHANG, Zhongyuan CHANG, Yanhong LI
Filed: 24 Feb 20
Utility
Memory Controller
16 Sep 20
The application discloses a memory controller coupled to a memory module for controlling access to the memory module.
Howard Chonghe YANG, Zhongyuan CHANG, Chunyi LI
Filed: 19 Dec 19
Utility
Memory Controller
16 Sep 20
The application discloses a memory controller coupled to a memory module for controlling access to the memory module, wherein the memory module comprises one or more memory groups each having a plurality of memory blocks, and the memory controller comprising: a registering clock driver coupled to the memory module for providing to the memory module a data access command so as to control access to the memory module; one or more data buffers coupled to the registering clock driver, and each data buffer coupled to a memory group via a memory group data interface; wherein at least one of the memory group data interfaces comprises a plurality of data buses each coupled to one or more memory blocks of the memory group that the memory group data interface coupled to, such that the memory group can exchange data with the data buffer via the plurality of data buses under the control of the registering clock driver.
Qingjiang MA, Gang SHAN, Chunyi LI
Filed: 19 Dec 19
Utility
Method for Calibrating Channel Delay Skew of Automatic Test Equipment
15 Jan 20
The present invention relates to a method for calibrating a channel delay skew of automatic test equipment (ATE), the method comprising: providing multiple calibration reference devices, wherein the calibration reference devices have a second plurality of delay paths each having a predetermined path delay value and coupling a pair of pins of one of the calibration reference devices together, wherein each pin is coupled to at most one delay path; coupling each of the calibration reference devices with the ATE, respectively, wherein the test probe of each of the first plurality of test channels is coupled with a pin of one of the calibration reference devices; testing the calibration reference devices to obtain multiple delay measurements from one or more transmitting channels of the first plurality of test channels to one or more receiving channels of the first plurality of test channels using the ATE; and calculating based on the delay measurements.
Yong WANG, Dongming LOU, Weidong FAN, Ronghui CHEN, Meng MEI
Filed: 10 Jul 19
Utility
One-die Trermination Control for Memory Systems
1 Jan 20
A memory system, comprising: a first plurality of memory ranks each having multiple memory cells; a second plurality of local controllers each coupled between one or more of the first plurality of memory ranks and a memory controller, the memory controller being configured to provide to a target local controller of the second plurality of local controllers, out of a first plurality of chip select (CS) signals, a target access CS signal enabling target access to a target memory rank of the first plurality of memory ranks coupled to the target local controller, and provide to the second plurality of local controllers, later than the target access CS signal, a command and address (CA) signal for addressing and accessing the multiple memory cells of the target memory rank; and wherein the target local controller is configured to generate, in response to receiving the target access CS signal, a target CA on-die termination (ODT) instruction switching on target CA ODT at its CA input at least for a period when the CA signal is being received from the memory controller.
Yibo JIANG, Gang YAN, Robert Xi JIN, Lizhi JIN, Leechung YIU
Filed: 27 Jun 18
Utility
Laminate Structure and Test Method for Detecting Inter-metal Dielectric Layer Defects
4 Dec 19
The present application disclosed a conducting layer-dielectric layer-conducting layer (CDC) laminate structure and test method for detecting defects of an inter-metal dielectric layer.
Xiong ZHANG, Chunlai SUN, Peichun WANG, Gang SHI
Filed: 26 May 19