32417 patents
Page 14 of 1621
Utility
Semiconductor Package
11 Jan 24
A semiconductor package includes a substrate having opposite first and second surfaces; (1-1)-th substrate pads and (1-2)-th substrate pads on the first surface of the substrate; first connecting terminals on the (1-1)-th substrate pads and the (1-2)-th substrate pads; (2-1)-th substrate pads and (2-2)-th substrate pads on the second surface of the substrate; an interposer on the second surface of the substrate; second connecting terminals between the (2-1)-th substrate pads, the (2-2)-th substrate pads, and the interposer; and a first semiconductor chip on the interposer.
Seong Ho Shin, Sang Kyu Kim, Ju-Youn Choi
Filed: 6 Jul 23
Utility
Semiconductor Device Having Package on Package Structure and Method of Manufacturing the Semiconductor Device
11 Jan 24
A semiconductor device having a package on package (PoP) structure, in which a fine pitch between package substrates is implemented, a total height of a package is reduced, and reliability is enhanced.
Jeonghyun Lee, Jihwang Kim, Jongbo Shim
Filed: 26 Sep 23
Utility
Semiconductor Devices Including Resistor Structures
11 Jan 24
A semiconductor device is provided including a resistor structure, the semiconductor device including a substrate having an upper surface perpendicular to a first direction; a resistor structure including a first insulating layer on the substrate, a resistor layer on the first insulating layer, and a second insulating layer on the resistor layer; and a resistor contact penetrating the second insulating layer and the resistor layer.
Tae-yeol KIM, Hyon-wook RA, Seo-bum LEE, Jun-soo KIM, Chung-hwan SHIN
Filed: 21 Sep 23
Utility
Semiconductor Device Including Interconnection Structure
11 Jan 24
A semiconductor device includes a lower structure; an intermediate insulating structure on the lower structure; an intermediate interconnection structure penetrating through the intermediate insulating structure; an upper insulating structure on the intermediate insulating structure and the intermediate interconnection structure; and an upper conductive pattern penetrating through the upper insulating structure and electrically connected to the intermediate interconnection structure, wherein the intermediate insulating structure includes an intermediate etch-stop layer and an intermediate insulating layer thereon, the intermediate insulating layer includes first and second intermediate material layers, the second intermediate material layer having an upper surface coplanar with an upper surface of the first intermediate material layer, the intermediate interconnection structure penetrates through the first intermediate material layer and the intermediate etch-stop layer, and a material of the first intermediate material layer has a dielectric constant that is higher than a dielectric constant of a material of the second intermediate material layer.
Yanghee LEE, Byoungho KWON, Jonghyuk PARK, Boun YOON, Ilyoung YOON, Seokjun HONG
Filed: 3 Jul 23
Utility
Semiconductor Package and Method of Manufacturing the Same
11 Jan 24
A semiconductor package includes: a substrate including a redistribution member having a first surface and a second surface, opposing each other, and including pad structures disposed on the first surface and a redistribution layer electrically connected to the pad structures, an interconnect chip disposed on the second surface of the redistribution member and including an interconnect circuit electrically connected to the redistribution layer, a via structure disposed around the interconnect chip and electrically connected to the redistribution layer, an encapsulant encapsulating at least a portion of each of the interconnect chip and the via structure, and bump structures disposed on the encapsulant; and a first chip structure and a second chip structure disposed on the first surface of the redistribution member and electrically connected to the pad structures.
Yongkoon Lee, Youngchan Ko, Byungho Kim
Filed: 11 Apr 23
Utility
Semiconductor Devices
11 Jan 24
A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.
Gyu-Hwan Ahn, Sung-Soo Kim, Chae-Ho Na, Dong-Hyun Roh, Sang-Jin Hyun
Filed: 25 Sep 23
Utility
Highly Integrated Image Sensors Using Inter-substrate Wiring Structures
11 Jan 24
An image sensor includes a first substrate having a first transistor integrated therein, and a first plurality of wiring structures on the first substrate.
Minho Jang, Doowon Kwon, Kyungtae Lim, Donghyun Kim
Filed: 5 Apr 23
Utility
Semiconductor Package and Method of Manufacturing the Same
11 Jan 24
A semiconductor package includes: a substrate including a first region and a second region at least partially surrounding the first region in a plane defined by first and second horizontal directions, wherein the substrate has a first surface and a second surface opposed to the first surface; a wiring pattern disposed on the first surface of the substrate; a first recess formed on the second surface of the substrate and in the second region of the substrate; a back side insulating layer disposed on the second surface of the substrate, wherein the back side insulating layer fills an inside of the first recess; a through via penetrating through the first region of the substrate and the back side insulating layer, wherein the through via connects to the wiring pattern; and a second recess formed in the back side insulating layer and on the first recess.
In Sup SHIN, Jung-Seok Ahn, Hyeong Mun Kang, Seung Woo Sim
Filed: 23 Feb 23
Utility
Semiconductor Package Including an Adhesive Structure
11 Jan 24
A semiconductor package includes a package substrate, where a plurality of bonding pads are arranged on an upper surface of the package substrate; a semiconductor chip mounted on the upper surface of the package substrate, where a plurality of chip pads are arranged on an upper surface of the semiconductor chip; a first adhesive film attached to a lower surface of the semiconductor chip, wherein the first adhesive film having a first area corresponding to an area of the semiconductor chip; a second adhesive film attached to the upper surface of the package substrate, where the second adhesive film is joined to the first adhesive film, and the second adhesive film has a second area larger than the first area; a plurality of bonding wires; and a molding portion disposed on the upper surface of the package substrate.
JOOYOUNG OH
Filed: 30 Jun 23
Utility
Semiconductor Package
11 Jan 24
A semiconductor package including: a lower chip; a chip structure including stacked semiconductor chips; and an adhesive film, the semiconductor chips include first bonding chips bonded to each other by bumps and second bonding chips directly bonded to each other, the first bonding chips include: a first bonding lower chip including a first bonding upper pad; and a first bonding upper chip on the first bonding lower chip and including a first bonding lower pad, the second bonding chips include: a second bonding lower chip including a second bonding upper insulating layer and a second bonding upper pad; and a second bonding upper chip on the second bonding lower chip and including a second bonding lower insulating layer, and a second bonding lower pad, and the adhesive film surrounds side surfaces of the bumps, fills a region between the first bonding lower and upper chips, and protrudes from the region.
Youngdeuk KIM, Jaechoon KIM, Taehwan KIM, Kyungsuk OH, Heejung Hwang
Filed: 6 Jul 23
Utility
Semiconductor Package and Package Module Including the Same
11 Jan 24
A semiconductor package includes: a film having a first surface and a second surface, which are opposite to each other, and including a first connection region and a second connection region, which are spaced apart from each other; first connection pads disposed on the first connection region; second connection pads disposed on the second connection region; and a semiconductor chip disposed on the first surface and between the first connection region and the second connection region, wherein the semiconductor chip includes: input pads disposed on a first pad region; first output pads disposed on the first pad region; and second output pads disposed on a second pad region spaced apart from the first pad region, and at least one of the first output pads is electrically connected to a corresponding second connection pad of the second connection pads through a first via and a second via penetrating the film.
SOYOUNG LIM
Filed: 21 Mar 23
Utility
Image Sensor
11 Jan 24
An image sensor includes a semiconductor layer including a first section and a second section, the semiconductor layer having a first surface and a second surface that face each other, a device isolation layer in the semiconductor layer and defining a plurality of pixels; a first grid pattern on the first surface of the semiconductor layer over the first section; and a light-shield pattern on the first surface of the semiconductor layer over the second section.
Yun Ki Lee, Jung-Saeng Kim, Hyungeun Yoo
Filed: 20 Sep 23
Utility
Semiconductor Device
11 Jan 24
A semiconductor device includes a substrate, first and second supporter patterns spaced vertically from the substrate, the second supporter pattern being spaced vertically from the first supporter pattern, a lower electrode hole extending vertically on the substrate, a lower electrode inside the lower electrode hole, contacting a sidewall of the first and second supporter patterns, the lower electrode including a first layer along a portion of a sidewall and bottom surface of the lower electrode hole, a second layer between the first layers, and a third layer on an upper surface of the first and second layers, the first and second layers including a material different from the second layer, and a sidewall of at least a portion of the third layer being concave toward the third layer, overlapping the second layer in the vertical direction, and being spaced apart from the second layer in the vertical direction.
Hong Sik CHAE, Tae Kyun KIM, Ji Hoon AN, Hyun-Suk LEE, Gi Hee CHO, Jae Hyoung CHOI
Filed: 10 Mar 23
Utility
Wireless Power Receiving Apparatus for Carrying Out In-band Communication with Wireless Power Transmitting Apparatus and Method for Carrying Out In-band Communication In Wireless Power Receiving Apparatus
11 Jan 24
A wireless power receiving apparatus is provided.
Hangseok CHOI
Filed: 19 Sep 23
Utility
Apparatus for Transmitting and Receiving a Signal, a Method of Operating the Same, a Memory Device, and a Method of Operating the Memory Device
11 Jan 24
A signal transmitting and receiving apparatus including: a first on-die termination circuit connected to a first pin through which a first signal is transmitted or received and, when enabled, the first on-die termination circuit is configured to provide a first termination resistance to a signal line connected to the first pin; a second on-die termination circuit connected to a second pin through which a second signal is transmitted or received and, when enabled, the second on-die termination circuit is configured to provide a second termination resistance to a signal line connected to the second pin; and an on-die termination control circuit configured to independently control an enable time and a disable time of each of the first on-die termination circuit and the second on-die termination circuit.
Changkyo LEE, Dongkeon Lee, Jinhoon Jang, Kyungsoo Ha, Kiseok Oh, Kyungryun Kim
Filed: 26 Sep 23
Utility
Light Emitting Device and Display Device Including the Same
11 Jan 24
An electroluminescent device that includes a first electrode and a second electrode spaced apart from each other, a light emitting layer disposed between the first electrode and the second electrode, an electron transport layer disposed between the light emitting layer and the second electrode, and an organic layer disposed on the electron transport layer.
Hong Kyu SEO, Soonmin CHA, Dongchan KIM, Enjung KIM, Taehyung KIM, Tae Ho KIM, Shin Ae JUN, You Jung CHUNG
Filed: 10 Jul 23
Utility
Antenna Structure and Electronic Device Including the Same
11 Jan 24
According to an embodiment of the disclosure, an electronic device may comprise: a housing including a conductive portion, a plurality of non-conductive portions, and a plurality of openings, a plurality of keyboard key caps exposed through the plurality of openings of the housing, an antenna, and a circuit board disposed inside the housing and electrically connected to the antenna.
Kwangbok PARK, Jaeho LEE, Yonghun JI
Filed: 6 Jul 23
Utility
Method and Apparatus for Transmission Configuration Indication Signaling
11 Jan 24
Method and apparatuses for supporting or utilizing transmission configuration indication signaling.
Dalin Zhu, Emad Nader Farag, Md. Saifur Rahman, Eko Onggosanusi
Filed: 27 Jun 23
Utility
Method and Apparatus for Transmitting and Receiving Polar Code
11 Jan 24
A 5th generation (5G) or 6th generation (6G) communication system for supporting a higher data rate than a beyond 4th generation (4G) communication system, such as long-term evolution (LTE) is provided.
Donghun LEE, Minchul KIM, Sang-Hyo KIM, Hyosang JU, Jisang PARK
Filed: 16 May 23
Utility
Camera Module Including Refractive Member and Electronic Device Including Refractive Member
11 Jan 24
According to certain embodiments, a camera module comprises a refractive member configured to reflect or refract at least a portion of light received by the camera module; and an image sensor configured to detect at least a portion of light reflected or refracted by the refractive member, wherein the refractive member includes an effective area configured to provide a path of the light and a dummy area disposed on at a portion of an edge of the effective area and configured to scatter at least a part of light incident onto the dummy area.
Hokeun KWAK, Dongil SEO
Filed: 10 Aug 23