26900 patents
Page 18 of 1345
Utility
Display apparatus and method for registration of user command
2 Jan 24
A display apparatus includes an input unit configured to receive a user command; an output unit configured to output a registration suitability determination result for the user command; and a processor configured to generate phonetic symbols for the user command, analyze the generated phonetic symbols to determine registration suitability for the user command, and control the output unit to output the registration suitability determination result for the user command.
Nam-yeong Kwon, Kyung-mi Park
Filed: 7 Oct 22
Utility
Memory system
2 Jan 24
A memory system includes: nonvolatile memory devices and a memory controller confirming a programming time for each word line of each of the nonvolatile memory devices and calculating a target programming time on the basis of the programming time for each word line.
Youngbong Kim
Filed: 13 Sep 21
Utility
Wafer cleaning apparatus, method for cleaning wafer and method for fabricating semiconductor device
2 Jan 24
A wafer cleaning apparatus, a method of cleaning wafer and a method of fabricating a semiconductor device are provided.
SeongKeun Cho, Young Hoo Kim, Seung Min Shin, Tae Min Earmme, Kun Tack Lee, Hun Jae Jang, Eun Hee Jeang
Filed: 18 Jan 23
Utility
Package substrate film and semiconductor package including the same
2 Jan 24
A package substrate film including a film substrate including upper and lower surfaces; a test pattern including an upper test line pattern extending on the upper surface of the film substrate; a lower test line pattern extending on the lower surface of the film substrate; a first test via pattern penetrating the film substrate and connecting the upper test line pattern to the lower test line pattern; a second test via pattern penetrating the film substrate outside the first test via pattern and connecting the upper test line pattern to the lower test line pattern; and a test pad between the first test via pattern and the second test via pattern, the test pad including first test pad at an outer side of the first test via pattern; and second test pad at an inner side of the second test via pattern and facing the first test pad.
Kyoungsuk Yang, Soyoung Lim, Yechung Chung
Filed: 7 Jun 21
Utility
Fan-out semiconductor package
2 Jan 24
A fan-out semiconductor package includes a core member having a through hole, at least one dummy structure disposed in the core member, a semiconductor chip disposed in the through hole and including an active surface on which a connection pad is disposed and an inactive surface opposing the active surface, an encapsulant sealing at least a portion of each of the core member and the semiconductor chip, and filing at least a portion of the through hole, and a connection member disposed on the core member and the active surface of the semiconductor chip, and including a redistribution layer electrically connected to the connection pad.
Jung Soo Kim
Filed: 7 Jul 21
Utility
Semiconductor device including a cell array region and an extension region
2 Jan 24
A semiconductor device, in which a cell array region and an extension region are arranged along a first direction, and in which contact regions and through regions are alternately arranged along the first direction in the extension region, including: a mold structure including a plurality of first insulating patterns and a plurality of gate electrodes, which are alternately stacked on a first substrate; a channel structure penetrating the mold structure in the cell array region to intersect the plurality of gate electrodes; respective gate contacts that are on the mold structure in the contact regions and are connected to each of the gate electrodes; and a plurality of second insulating patterns, the second insulating patterns being stacked alternately with the first insulating patterns in the mold structure in the through regions, the plurality of second insulating patterns including a different material from the plurality of first insulating patterns.
Jun Hyoung Kim, Young-Jin Kwon, Geun Won Lim
Filed: 11 Sep 20
Utility
Semiconductor package
2 Jan 24
A semiconductor package includes a package substrate having a first insulating layer, a wiring layer disposed on the first insulating layer, and a second insulating layer disposed on the first insulating layer and covering at least a portion of the wiring layer, a pair of support members disposed to face each other on the second insulating layer of the package substrate, and a pair of semiconductor chips disposed between the pair of support members and electrically connected to the wiring layer, wherein the second insulating layer has an opening surrounding at least a portion of each of the pair of semiconductor chips.
Jooyoung Oh
Filed: 18 Aug 21
Utility
Semiconductor package
2 Jan 24
A semiconductor package comprising a first semiconductor chip and a second semiconductor chip disposed on the first semiconductor chip, wherein the first semiconductor chip includes a first semiconductor body, an upper pad structure, and a first through-electrode penetrating the first semiconductor body and electrically connected to the upper pad structure, and the second semiconductor chip includes a second semiconductor body, a lower bonding pad, and an internal circuit structure including a circuit element, internal circuit wirings, and a connection pad pattern disposed on the same level as the lower bonding pad, the upper pad structure includes upper bonding pads and connection wirings, the upper bonding pads are disposed at positions corresponding to the lower bonding pad and the connection pad pattern, and the internal circuit structure is electrically connected to the first through-electrode through at least one of the upper bonding pads and the connection wirings.
Aenee Jang
Filed: 6 Mar 23
Utility
Semiconductor package
2 Jan 24
A semiconductor package including a first semiconductor chip including a logic structure and a second semiconductor chip bonded to the first semiconductor chip may be provided.
Manho Lee, Eunseok Song, Keung Beum Kim, Kyung Suk Oh, Eon Soo Jang
Filed: 7 Jul 21
Utility
Integrated circuit device with protective antenna diodes integrated therein
2 Jan 24
An integrated circuit device includes a semiconductor substrate having components of a peripheral circuit structure formed in and on a surface of the semiconductor substrate.
Taemin Ok, Inmo Kim, Sujeong Kim, Daeseok Byeon
Filed: 20 May 21
Utility
Semiconductor device having increased contact area between a source/drain pattern and an active contact
2 Jan 24
A semiconductor device including a substrate including an active pattern; a gate electrode crossing the active pattern; a source/drain pattern adjacent to one side of the gate electrode and on an upper portion of the active pattern; an active contact electrically connected to the source/drain pattern; and a silicide layer between the source/drain pattern and the active contact, the source/drain pattern including a body part including a plurality of semiconductor patterns; and a capping pattern on the body part, the body part has a first facet, a second facet on the first facet, and a corner edge defined where the first facet meets the second facet, the corner edge extending parallel to the substrate, the capping pattern covers the second facet of the body part and exposes the corner edge, and the silicide layer covers a top surface of the body part and a top surface of the capping pattern.
Min-Hee Choi, Seokhoon Kim, Choeun Lee, Edward Namkyu Cho, Seung Hun Lee
Filed: 4 Mar 22
Utility
Method, electronic device, and storage medium for performing adaptive impedance matching
2 Jan 24
The present disclosure relates to an artificial intelligence (AI) system which simulates functions such as cognition, judgment, and the like of the human brain by utilizing machine learning algorithms such as deep learning and the like, and to an application thereof.
Sungku Yeo, Jaeseok Park, Kangyoon Lee, Chongmin Lee, Imran Ali, Kwangtae Kim, Dongin Kim, Seongjin Oh, Solhee In
Filed: 21 Sep 21
Utility
Apparatus and method for measuring low load current
2 Jan 24
An apparatus configured to measure a load current provided to a load of a switching converter includes a pulse generation circuit configured to generate a control pulse based on a power switch driving signal of the switching converter, a reference current generation circuit configured to generate a reference current based on the control pulse, a clock generation circuit configured to generate a clock signal based on the control pulse and the reference current, and a clock counter configured to count the number of cycles of the clock signal during a switching period of the switching converter.
Min Sang Park, Dongjin Keum, Byoungmook Kim
Filed: 5 Jan 22
Utility
Display apparatus and method for controlling thereof
2 Jan 24
A display apparatus is disclosed.
Deukgeun Ahn, Jaemoon Lee
Filed: 6 Jul 22
Utility
Method of color decomposition and method of demosaicing images based on deep learning using the same
2 Jan 24
In a method of color decomposition, inter-color images indicating similarity between color sensitivities are generated based on color images.
Jinhyung Kim, Wooseok Choi
Filed: 16 Apr 21
Utility
Facial verification method and apparatus
2 Jan 24
The facial verification apparatus is a mobile computing apparatus, including a camera to capture an image, a display, and one or more processors.
Seungju Han, Minsu Ko, Deoksang Kim, Jae-Joon Han
Filed: 25 Apr 19
Utility
Electronic device comprising display, and operation method thereof
2 Jan 24
On an electronic device which includes a display device comprising a display driving circuit, a processor, and a memory a method for changing a refresh rate of the display device includes: changing at least one of a first parameter, a second parameter, or a third parameter in response to identifying the occurrence of at least one of a scan rate change request or a change in scan rate change restriction, and applying the changed parameter among the first parameter, the second parameter, and the third parameter.
Gwanghui Lee, Minwoo Lee, Minwoo Kim, Seungjin Kim, Woojun Jung
Filed: 2 Feb 23
Utility
Memory device and operation method thereof
2 Jan 24
A memory device may include a first data line driver circuit that generates a first reference voltage set based on a first code and a second code associated with a first data line, and determines bit values of the first input data received through the first data line, based on the first reference voltage set.
Yoon-Joo Eom, Seungjun Bae, Hye Jung Kwon, Young-Ju Kim
Filed: 1 Dec 21
Utility
Storage devices and methods of operating storage devices
2 Jan 24
A storage device includes a nonvolatile memory device and a memory controller to control the nonvolatile memory device.
Sehwan Park, Jinyoung Kim, Youngdeok Seo, Dongmin Shin, Joonsuc Jang, Sungmin Joe
Filed: 19 Dec 22
Utility
Processor for fine-grain sparse integer and floating-point operations
2 Jan 24
A processor for fine-grain sparse integer and floating-point operations and method of operation thereof are provided.
Ali Shafiee Ardestani, Joseph Hassoun
Filed: 22 Dec 20