10908 patents
Page 28 of 546
Utility
Apparatus and method for quantized convergent direction-based ray sorting
10 Oct 23
Apparatus and method for grouping rays based on quantized ray directions.
Karol Szerszen, Prasoonkumar Surti, Gabor Liktor, Karthik Vaidyanathan, Sven Woop
Filed: 22 Feb 22
Utility
Isolation gap filling process for embedded dram using spacer material
10 Oct 23
Embodiments disclosed herein include transistors and methods of forming such transistors.
Chieh-Jen Ku, Bernhard Sell, Pei-Hua Wang, Harish Ganapathy, Leonard C. Pipes
Filed: 29 Jan 19
Utility
tv7s2a2xb7u 05fa9y9wtt70z1nzk9ge4lse572v9958odvopka
10 Oct 23
Disclosed herein are structures and assemblies that may be used for thermal management in integrated circuit (IC) packages.
Feras Eid, Telesphor Kamgaing, Georgios Dogiamis, Aleksandar Aleksov, Johanna M. Swan
Filed: 6 Aug 19
Utility
0w87 ox0rafktltl06sch8yybboog49jo2ex4bgddq8drhgfj7okt8
10 Oct 23
Embodiments may relate to a die with a front-end and a backend.
Aleksandar Aleksov, Adel A. Elsherbini, Feras Eid, Veronica Aleman Strong, Johanna M. Swan
Filed: 21 Jan 22
Utility
zajri9hkn6vurwealrs1g9t8ykhatlpo
10 Oct 23
Composite integrated circuit (IC) device structures that include two components coupled through hybrid bonded interconnect structure.
Richard Vreeland, Colin Carver, William Brezinski, Michael Christenson, Nafees Kabir
Filed: 22 Feb 22
Utility
zjgki0gb6e7f kmzeogqgq9ffs3g8fr7pnvtz2c07xlzxbrsz0kga
10 Oct 23
A die interconnect substrate comprises a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die.
Robert Alan May, Kristof Darmawikarta, Sri Ranga Sai Sai Boyapati
Filed: 23 Jun 21
Utility
nowflu4i m1fr8g850ozvhwol8msfc5fukf6kfjzyag9vd5jbytsdxyb
10 Oct 23
Programming a multilevel cell (MLC) nonvolatile (NV) media can be performed with internal buffer reuse to reduce the need for external buffering.
Shankar Natarajan, Suresh Nagarajan, Aliasgar S. Madraswala, Yihua Zhang
Filed: 23 Dec 20
Utility
04zyamh5uj2vdce0bvhwvywi83xv238iqvpn
10 Oct 23
An integrated circuit device with a single via layer, in which the via layer includes selectable via sites and/or jumpers.
Eah Loon Alan Chuah, Ting Ting Au
Filed: 20 Dec 19
Utility
2hkuzus5cqfm8gk1j3lu4d9 aztn5npzinybe8k4cfm07jk
10 Oct 23
Embodiments include semiconductor packages and methods of forming the semiconductor packages.
Sonja Koller, Kilian Roth, Josef Hagn, Andreas Wolter, Andreas Augustin
Filed: 23 May 19
Utility
v1e8en85fl8yfzya0g4exifjn2
10 Oct 23
An integrated circuit package is disclosed.
Dae-Woo Kim, Ajay Jain, Neha M. Patel, Rodrick J. Hendricks, Sujit Sharan
Filed: 26 May 22
Utility
q9l8z04l6165w atqan69dxtomrvvfibeykg13oseg9n6dom463g
10 Oct 23
Disclosed herein are tri-gate transistor arrangements, and related methods and devices.
Sean T. Ma, Aaron D. Lilak, Justin R. Weber, Harold W. Kennel, Willy Rachmady, Gilbert W. Dewey, Cheng-Ying Huang, Matthew V. Metz, Jack T. Kavalieros, Anand S. Murthy, Tahir Ghani
Filed: 14 Dec 16
Utility
ao219c05xgl7xtshsju2fl66vkezeqzd1deox
10 Oct 23
A transistor includes a semiconductor body including a material such as an amorphous or polycrystalline material, for example and a gate stack on a first portion of the body.
Seung Hoon Sung, Gilbert Dewey, Abhishek Sharma, Van H. Le, Jack Kavalieros
Filed: 28 Jun 19
Utility
wmf4oj27rjyda16kyos8a4rwqdg1bobzt19dtd2yw448y94jj7bhh
10 Oct 23
Semiconductor devices having necked semiconductor bodies and methods of forming semiconductor bodies of varying width are described.
Bernhard Sell
Filed: 14 Sep 21
Utility
jyahkjwooqr7554u 2ynnjos08879lxq
10 Oct 23
Some demonstrative embodiments include apparatuses, devices, systems and methods of beamforming.
Solomon B. Trainin, Assaf Kasher, Carlos Cordeiro
Filed: 14 Dec 20
Utility
7t55z2g49keh4pgpvkgz9aex6eszhebz05gasyk2pm
10 Oct 23
Disclosed herein are integrated circuit (IC) components with dummy structures, as well as related methods and devices.
Kevin L. Lin, Nicholas James Harold McKubre, Richard Farrington Vreeland, Sansaptak Dasgupta
Filed: 21 Mar 22
Utility
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10 Oct 23
An apparatus is provided which comprises: a first die having a first surface and a second surface, the first die comprising: a first layer formed on the first surface of the first die, and a second layer formed on the second surface of the first die; a second die coupled to the first layer; and a plurality of structures to couple the apparatus to an external component, wherein the plurality of structures is coupled to the second layer.
Anup Pancholi, Kimin Jun
Filed: 30 Nov 21
Utility
0ws6hz6gju1z3uvhb9iy6dyc
10 Oct 23
Embodiments of the present disclosure may generally relate to systems, apparatus, and/or processes directed to a manufacturing process flow for packages that include one or more glass layers that include patterning features, such as electrically conductive traces, RDLs, and vias within the packages.
Jieying Kong, Gang Duan, Srinivas Pietambaram, Patrick Quach, Dilan Seneviratne
Filed: 18 Sep 19
Utility
e25sko7manthu683fe2rzxuprkkmerhld1vk8dm0hsz06rnihhdrt3dkidmy
10 Oct 23
A circuit includes a first communication interface configured to receive first sensor data from a stationary sensor.
Oleg Pogorelik, Omer Ben-Shalom, Alex Nayshtut
Filed: 29 Dec 17
Utility
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10 Oct 23
In one embodiment, a processor includes: a plurality of cores; a first storage to store parameter information for a voltage regulator to couple to the processor via a voltage regulator interface; and a power controller to control power consumption of the processor.
Anupama Suryanarayanan, Avinash N. Ananthakrishnan, Chinmay Ashok, Jeremy J. Shrall
Filed: 31 May 22
Utility
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10 Oct 23
Embodiments of systems, apparatuses, and methods for fused multiple add.
Robert Valentine, Galina Ryvchin, Piotr Majcher, Mark J. Charney, Elmoustapha Ould-Ahmed-Vall, Jesus Corbal, Milind B. Girkar, Zeev Sperber, Simon Rubanovich, Amit Gradstein
Filed: 13 Oct 22