166 patents
Page 2 of 9
Utility
Method of Integration of a Magnetoresistive Structure
13 Jul 23
A method of manufacturing one or more interconnects to magnetoresistive structure comprising (i) depositing a first conductive material in a via; (2) etching the first conductive material wherein, after etching the first conductive material a portion of the first conductive material remains in the via, (3) partially filling the via by depositing a second conductive material in the via and directly on the first conductive material in the via; (4) depositing a first electrode material in the via and directly on the second conductive material in the via; (5) polishing a first surface of the first electrode material wherein, after polishing, the first electrode material is (i) on the second conductive material in the via and (ii) over the portion of the first conductive material remaining in the via; and (6) forming a magnetoresistive structure over the first electrode material.
Kerry Joseph NAGEL, Kenneth SMITH, Moazzem HOSSAIN, Sanjeev AGGARWAL
Filed: 16 Mar 23
Utility
Magnetoresistive Stack with Seed Region and Method of Manufacturing the Same
13 Jul 23
A magnetoresistive stack/structure and method of manufacturing same comprising wherein the stack/structure includes a seed region, a fixed magnetic region disposed on and in contact with the seed region, a dielectric layer(s) disposed on the fixed magnetic region and a free magnetic region disposed on the dielectric layer(s).
Jijun SUN, Sanjeev AGGARWAL, Han-Jong CHIA, Jon M. SLAUGHTER, Renu WHIG
Filed: 17 Mar 23
Utility
Magnetoresistive stack with seed region and method of manufacturing the same
27 Jun 23
A magnetoresistive stack/structure and method of manufacturing same comprising wherein the stack/structure includes a seed region, a fixed magnetic region disposed on and in contact with the seed region, a dielectric layer(s) disposed on the fixed magnetic region and a free magnetic region disposed on the dielectric layer(s).
Jijun Sun, Sanjeev Aggarwal, Han-Jong Chia, Jon M. Slaughter, Renu Whig
Filed: 23 Dec 20
Utility
Magnetic field sensor with increased SNR
23 May 23
Various means for improvement in signal-to-noise ratio (SNR) for a magnetic field sensor are disclosed for low power and high resolution magnetic sensing.
Phillip G. Mather, Anuraag Mohan
Filed: 16 Sep 20
Utility
Systems and methods for dual standby modes in memory
16 May 23
The present disclosure is drawn to, among other things, a method for accessing memory using dual standby modes, the method including receiving a first standby mode indication selecting a first standby mode from a first standby mode or a second standby mode, configuring a read bias system to provide a read bias voltage and a write bias system to provide approximately no voltage, or any voltage outside the necessary range for write operation, based on the first standby mode, receiving a second standby mode indication selecting the second standby mode, and configuring the read bias system to provide at least the read bias voltage and the write bias system to provide a write bias voltage based on the second standby mode, the read bias voltage being lower than the write bias voltage.
Syed M. Alam
Filed: 17 Nov 21
Utility
Midpoint sensing reference generation for STT-MRAM
16 May 23
The present disclosure is drawn to a magnetoresistive device including an array of memory cells arranged in rows and columns, each memory cell comprising a magnetic tunnel junction, each row comprising a word line, and each column comprising a bit line; a column select device that selects a bit line.
Syed M. Alam, Yaojun Zhang, Frederick Neumeyer
Filed: 7 Dec 20
Utility
In-plane spin orbit torque magnetoresistive stack/structure and methods therefor
25 Apr 23
The present disclosure is drawn to, among other things, a magnetoresistive device and a magnetoresistive memory comprising a plurality of such magnetoresistive devices.
Sumio Ikegawa, Han Kyu Lee, Sanjeev Aggarwal, Jijun Sun, Syed M. Alam, Thomas Andre
Filed: 16 Jan 20
Utility
Method of integration of a magnetoresistive structure
18 Apr 23
A method of manufacturing one or more interconnects to magnetoresistive structure comprising (i) depositing a first conductive material in a via; (2) etching the first conductive material wherein, after etching the first conductive material a portion of the first conductive material remains in the via, (3) partially filling the via by depositing a second conductive material in the via and directly on the first conductive material in the via; (4) depositing a first electrode material in the via and directly on the second conductive material in the via; (5) polishing a first surface of the first electrode material wherein, after polishing, the first electrode material is (i) on the second conductive material in the via and (ii) over the portion of the first conductive material remaining in the via; and (6) forming a magnetoresistive structure over the first electrode material.
Kerry Joseph Nagel, Kenneth Smith, Moazzem Hossain, Sanjeev Aggarwal
Filed: 11 May 21
Utility
Systems and methods for dual standby modes in memory
11 Apr 23
The present disclosure is drawn to, among other things, a method for accessing memory using dual standby modes, the method including receiving a first standby mode indication selecting a first standby mode from a first standby mode or a second standby mode, configuring a read bias system to provide a read bias voltage and a write bias system to provide approximately no voltage, or any voltage outside the necessary range for write operation, based on the first standby mode, receiving a second standby mode indication selecting the second standby mode, and configuring the read bias system to provide at least the read bias voltage and the write bias system to provide a write bias voltage based on the second standby mode, the read bias voltage being lower than the write bias voltage.
Syed M. Alam
Filed: 17 Nov 21
Utility
Methods of Forming Magnetoresistive Devices and Integrated Circuits
30 Mar 23
Magnetoresistive device architectures and methods for manufacturing are presented that facilitate integration of process steps associated with forming such devices into standard process flows used for surrounding logic/circuitry.
Kerry Joseph NAGEL, Sanjeev AGGARWAL, Thomas ANDRE, Sarin A. DESHPANDE
Filed: 11 Oct 22
Utility
Magnetoresistive Devices and Methods of Fabricating Magnetoresistive Devices
23 Feb 23
A method of manufacturing a magnetoresistive device may comprise forming a first magnetic region, an intermediate region, and a second magnetic region of a magnetoresistive stack above a via; removing at least a portion of the second magnetic region using a first etch; removing at least a portion of the intermediate region and at least a portion of the first magnetic region using a second etch; removing at least a portion of material redeposited on the magnetoresistive stack using a third etch; and rendering at least a portion of the redeposited material remaining on the magnetoresistive stack electrically non-conductive.
Sanjeev AGGARWAL, SHIMON, Kerry Joseph NAGEL
Filed: 11 Oct 22
Utility
Magnetoresistive Devices and Methods Therefor
16 Feb 23
A magnetoresistive stack may include: a fixed region having a fixed magnetic state, a spacer region, a first dielectric layer and a second dielectric layer, where both the first dielectric layer and the second dielectric layer are between the fixed region and the spacer region, and a free region between the first dielectric layer and the second dielectric layer.
Jijun SUN
Filed: 9 Aug 21
Reissue
Three axis magnetic field sensor
31 Jan 23
Three bridge circuits (101, 111, 121), each include magnetoresistive sensors coupled as a Wheatstone bridge (100) to sense a magnetic field (160) in three orthogonal directions (110, 120, 130) that are set with a single pinning material deposition and bulk wafer setting procedure.
Phillip Mather, Jon Slaughter, Nicholas Rizzo
Filed: 28 Mar 17
Utility
Systems and Methods for Configuration of a Configuration Bit with a Value
26 Jan 23
The present disclosure is drawn to, among other things, a configuration bit including at least four resistive elements and a voltage amplifier.
Dimitri HOUSSAMEDDINE, Syed M. ALAM, Sanjeev AGGARWAL
Filed: 28 Feb 22
Utility
Magnetoresistive devices and methods of fabricating magnetoresistive devices
15 Nov 22
A method of manufacturing a magnetoresistive device may comprise forming a first magnetic region, an intermediate region, and a second magnetic region of a magnetoresistive stack above a via; removing at least a portion of the second magnetic region using a first etch; removing at least a portion of the intermediate region and at least a portion of the first magnetic region using a second etch; removing at least a portion of material redeposited on the magnetoresistive stack using a third etch; and rendering at least a portion of the redeposited material remaining on the magnetoresistive stack electrically non-conductive.
Sanjeev Aggarwal, Shimon, Kerry Joseph Nagel
Filed: 28 Dec 20
Utility
Stacked magnetoresistive structures and methods therefor
1 Nov 22
Aspects of the present disclosure are directed to magnetic tunnel junction (MTJ) structures comprising multiple MTJ bits connected in series.
Jijun Sun, Frederick Mancoff, Jason Janesky, Kevin Conley, Lu Hui, Sumio Ikegawa
Filed: 27 Jun 19
Utility
Cryptographic Mram and Methods Thereof
27 Oct 22
The present disclosure is drawn to, among other things, a storage device.
Syed M. ALAM, Sanjeev AGGARWAL
Filed: 22 Apr 22
Utility
Methods of forming magnetoresistive devices and integrated circuits
25 Oct 22
Magnetoresistive device architectures and methods for manufacturing are presented that facilitate integration of process steps associated with forming such devices into standard process flows used for surrounding logic/circuitry.
Kerry Joseph Nagel, Sanjeev Aggarwal, Thomas Andre, Sarin A. Deshpande
Filed: 28 Dec 20
Utility
Methods of Manufacturing Integrated Circuit Devices
20 Oct 22
A method of manufacturing an integrated circuit device comprises forming a layer of barrier material on a surface, where the surface includes interlayer dielectric and a feature of a metal layer.
Sanjeev AGGARWAL, Kerry NAGEL, Santosh KARRE
Filed: 14 Apr 22
Utility
Systems and Methods for nor Page Write Emulation Mode In Serial Stt-mram
15 Sep 22
The present disclosure is drawn to, among other things, a method of managing a magnetoresistive memory (MRAM) device.
Syed M. ALAM, Cristian P. MASGRAS
Filed: 15 Mar 21