849 patents
Page 27 of 43
Utility
Electronic device and method of manufacturing the same
19 Oct 20
A performance of an electronic device is improved.
Kazuaki Tsuchiyama, Motoo Suwa, Ryuichi Oikawa
Filed: 12 May 19
Utility
Cache memory device with access controller that accesses one of data memory and main memory based on retained cache hit determination result in response to next access
19 Oct 20
A cache memory device includes: data memory that stores cache data corresponding to data in main memory; tag memory that stores tag information to identify the cache data; an address estimation unit that estimates a look-ahead address to be accessed next; a cache hit determination unit that performs cache hit determination on the look-ahead address, based on the stored tag information; and an access controller that accesses the data memory or the main memory based on the retained cache hit determination result in response to a next access.
Tatsuhiro Tachibana
Filed: 15 Nov 17
Utility
Manufacturing method of semiconductor device and semiconductor device
19 Oct 20
A manufacturing method of a semiconductor device, includes: (a) preparing a lead frame having: a first tie bar extending in a first direction in plan view so as to couple a plurality of first leads to one another; a second tie bar extending in the first direction in plan view so as to couple a plurality of second leads to one another; a coupling portion coupled to the first tie bar and the second tie bar; a first chip mounting portion arranged between the first tie bar and the second tie bar in plan view; and a second chip mounting portion arranged between the first chip mounting portion and the second tie bar in plan view; and (b) after the (a), mounting a first semiconductor chip on the first chip mounting portion and mounting a second semiconductor chip on the second chip mounting portion.
Shoji Hashizume, Keita Takada
Filed: 25 Jun 19
Utility
Electronic device
19 Oct 20
An electronic device includes a wiring board and a semiconductor device on the wiring board's main surface.
Tatsuaki Tsukuda
Filed: 7 Apr 19
Utility
Semiconductor device and method of manufacturing the same
19 Oct 20
Assembly of the semiconductor device includes the following steps: (a) mounting a semiconductor chip on the bottom electrode 40; (b) mounting the top electrode 30 on the semiconductor chip; (c) forming a sealing body 70 made of resin and provided with a convex portion 74 so as to cover the semiconductor chip; and (d) exposing the electrode surface 31 of the top electrode 30 on the top surface of the sealing body 70 and exposing the electrode surface 41 of the bottom electrode 40 on the back surface of the sealing body 70.
Kuniharu Muto, Hideyuki Nishikawa
Filed: 12 May 19
Utility
Semiconductor device
19 Oct 20
A semiconductor device includes a semiconductor substrate, a memory cell formed on the semiconductor substrate, a word line connected to the memory cell, and an auxiliary line connected to the word line.
Yuta Yoshida, Makoto Yabuuchi, Yoshisato Yokoyama
Filed: 30 Jul 19
Utility
Semiconductor device and method of manufacturing the same
19 Oct 20
There is provided with the following semiconductor device to improve its reliability.
Nobuo Tsuboi
Filed: 7 Oct 18
Utility
Semiconductor device and method of controlling semiconductor device including controlling a plurality of cores
12 Oct 20
The semiconductor device includes a plurality of cores, a sensor for detecting a temperature, and a control circuit configured to obtain each power consumption of the respective cores so as to select the core as a control object in accordance with the obtained power consumption.
Takahiko Gomi, Ryu Nagasawa
Filed: 10 Jun 18
Utility
Semiconductor device and reconfiguration control method of the same
12 Oct 20
Power consumption of a semiconductor device is reduced.
Yasumasa Watanabe, Mitsuhiro Ono, Toshiro Fujisaki, Kenji Kimura
Filed: 3 Oct 18
Utility
Method of manufacturing semiconductor device
12 Oct 20
To improve reliability of a semiconductor device, in a method of manufacturing the semiconductor device, a ground plane region of an n-type MISFET is formed by ion-implanting a p-type impurity and nitrogen (N) and a ground plane region of a p-type MISFET is formed by ion-implanting an n-type impurity and one of carbon (C) and fluorine (F).
Keiichi Maekawa
Filed: 11 Sep 18
Utility
Power supplying apparatus, power supplying control apparatus, and power supplying control method
12 Oct 20
To provide a power supplying control apparatus, a power supplying apparatus, and a power supplying control method which control power supply appropriately.
Kiichi Muto
Filed: 24 Jan 18
Utility
Semiconductor device and a method of manufacturing the same
5 Oct 20
For simplifying the dual-damascene formation steps of a multilevel Cu interconnect, a formation step of an antireflective film below a photoresist film is omitted.
Katsuhiko Hotta, Kyoko Sasahara
Filed: 11 Mar 20
Utility
Semiconductor device
5 Oct 20
A semiconductor device includes a bypass wiring connected with a first through via and a second through via, on a second surface side of a semiconductor substrate that is an opposite side of a wiring structure formed on a first surface side of the semiconductor substrate.
Kanato Yokoyama
Filed: 24 Feb 19
Utility
Positional relationship among components of semiconductor device
5 Oct 20
A QFP has a die pad on which a semiconductor chip is mounted, a plurality of inner parts disposed around the die pad, a plurality of outer parts respectively connected with the plurality of inner parts, a plurality of wires electrically connect the bonding pads of the semiconductor chip and the plurality of inner parts, and a sealing body that seals the semiconductor chip.
Noriyuki Takahashi
Filed: 19 Sep 19
Utility
Semiconductor device and IO-cell
5 Oct 20
According to an aspect, a semiconductor device and an IO-cell include a plurality of first power supply lines and a plurality of second power supply lines alternately arranged in a first direction, the first and second power supply lines each being supplied with electric power in which the voltage of the electric power supplied to the first power supply is different from that supplied to the second power supply, and a third power supply line formed in a wiring layer different from a wiring layer in which the first and second power supply lines are arranged, the third power supply line being connected to adjacent first power supply lines among the plurality of first power supply lines through a via, in which all of the first, second and third power supply lines are formed so as to extend in a second direction perpendicular to the first direction.
Keisuke Nakayama
Filed: 10 Jul 18
Utility
Semiconductor device and method of detecting its rotation abnormality
5 Oct 20
The conventional semiconductor device requires use of a separate vibration sensor or the like to detect a rotation abnormality of a motor.
Hisaaki Watanabe
Filed: 30 Oct 18
Utility
Rotation angle correction device and motor control system
5 Oct 20
A rotation angle correction device corrects a rotation angle of a converter converting a signal from a resolver attached to a motor.
Atsuhiro Hirata
Filed: 15 Apr 19
Utility
Communication device, link-up method, and communication system
5 Oct 20
In order to quickly and reliably establish link up, when a communication device detects power on or link down, an idle signal generation circuit generates an idle signal.
Masaru Nakamura
Filed: 29 Apr 18
Utility
Semiconductor memory device
5 Oct 20
It is to optimize the initial threshold voltages of each memory area in a semiconductor memory device including a plurality of memory areas.
Tomoya Saito, Naoki Takizawa
Filed: 12 Mar 19
Utility
Semiconductor device
28 Sep 20
A semiconductor device provided with: a first input/output circuit connected to a first pad; a second input/output circuit disposed in the direction along one side constituted by a chip edge in relation to the first input/output circuit, the second input/output circuit being connected to a second pad; and an ESD protective circuit disposed near the outer-side chip edge of the first and second input/output circuits.
Satoshi Maeda, Yasuyuki Morishita, Masanori Tanaka
Filed: 18 Jun 15