1577 patents
Utility
Semiconductor Device and Method of Manufacturing the Same
18 Jan 24
A semiconductor device with improved reliability is provided.
Kazuo TOMITA, Hiroki TAKEWAKA
Filed: 29 Sep 23
Utility
Semiconductor Device
18 Jan 24
A semiconductor device includes a crystal oscillator circuit, a first noise application circuit, and a second noise application circuit.
Soshiro NISHIOKA
Filed: 28 Jun 23
Utility
tvcnlv9c72ww8u4yeguewebbuwk16voi6eksrkgo1k1e
18 Jan 24
Kazuo SAKAMOTO
Filed: 13 Jul 22
Utility
iiabgkl4esu4 37q5poxw4234igszaz2jv9oaqw4bi1dxgx
16 Jan 24
An IGBT capable of handling high-speed switching while reducing a leakage current of a semiconductor device including the IGBT is provided.
Tomohiro Imai, Yoshito Nakazawa, Katsumi Eikyu
Filed: 18 Aug 21
Utility
2rlw h4zg4snsnpag3k3qirwys7jutloewi2r9
16 Jan 24
A message handler is described.
Christian Mardmoeller, Dnyaneshwar Kulkarni, Thorsten Hoffleit
Filed: 28 Apr 21
Utility
8wyi2tjq4r3tcenwcfk3wpjf
11 Jan 24
A visual inspection apparatus includes a stage on which a FCBGA type semiconductor package having a lid is placed, a camera located above the stage, a coaxial illumination device located between the camera and the stage, an oblique illumination device located between the camera and the stage, and a control device.
Hiroshi YAMASHITA, Masahiro IBE, Kojiro TANIMURA
Filed: 3 May 23
Utility
a1dzt2cnctv0oxo7ac1mk50ga13j24
11 Jan 24
A semiconductor device according to an embodiment includes a level detection unit that validates a level detection signal LD when a value indicated by stream data exceeds a threshold condition value, a ring buffer that cyclically stores internal data generated from the stream data in a storage area that is set within a predetermined address range, a data processing unit that operates with a bus clock and performs data processing using the internal data acquired from the ring buffer, and an address adjustment unit that adjusts a read address indicating a read start position of the ring buffer to a position that becomes a predetermined difference from a write address of the ring buffer at that time in accordance with a start of generation of the bus clock, and generates a bus clock during a period in which the level detection signal LD is valid.
Motoshige IKEDA
Filed: 15 May 23
Utility
6szpr1o4w61bdrh6t 65jdsu6t
11 Jan 24
A semiconductor device having a semiconductor substrate, a BOX film on the semiconductor substrate, a semiconductor layer on the BOX film, a first trench penetrated through the semiconductor layer and reached to the first insulating film, a first insulating film covering a side surface of the first trench and in contact with an upper surface of the BOX film at a bottom of the first trench, a second trench formed at the bottom of the first trench such that the second trench penetrates through the first insulating film and reached in the BOX film, a second insulating film filled in the first trench and the second trench.
Hiroyuki ARIE, Takayuki IGARASHI
Filed: 17 May 23
Utility
gnr8r5m4v24vbczu 5u88h8br96ur0c2l5h19wpyalljr76fz
9 Jan 24
The data processing apparatus includes a memory protection setting storage unit capable of storing a plurality of address sections as memory protection setting targets, a plurality of first determination units provided for each of the address sections stored in the memory protection setting storage unit and provisionally determining whether or not an access request is permitted based on whether or not an access destination address specified by the access request corresponds to the address section acquired from the memory protection setting storage unit, and a second determination unit finally determining whether or not the access request is permitted based on the classification information and the results of provisional determinations by the first determination unit.
Yasuhiro Sugita
Filed: 22 Dec 21
Utility
rh0wrzu1xba0oxh5ewof2
9 Jan 24
A semiconductor device includes: a nonvolatile memory cell including first memory cells and second memory cells; a bit latch; and a saved register.
Takanori Moriyasu, Kazuo Yoshihara, Takayuki Nishiyama
Filed: 12 May 21
Utility
g33mftxw1v3b1 d7z5o7tqvgpbx
4 Jan 24
A source pad electrically coupled with a source of a MOSFET of a semiconductor chip and located at a position below a lead in cross-sectional view is electrically connected with the lead for source via a conductive member bonded to the source pad and a wire bonded to the conductive member.
Noriko NUMATA, Koichi HASEGAWA, Tatsuaki TSUKUDA
Filed: 26 Apr 23
Utility
v7vdifn3ryr8dwizgxd6fahi7p3k6fir72g901wggxpjatb
4 Jan 24
A semiconductor device includes a chip mounting portion and a semiconductor chip provided on the chip mounting portion via a conductive adhesive material.
Yasutaka NAKASHIBA, Toshiyuki HATA, Hiroshi YANAGIGAWA, Tomohisa SEKIGUCHI
Filed: 7 Jun 23
Utility
cigrdnmowo kl39prkbrx9r1509opqjldn
4 Jan 24
A semiconductor device includes a first metal film forming an uppermost layer wiring that has a bonding pad.
Shota OKABE, Nozomi ITO, Yuji TAKAHASHI
Filed: 27 Mar 23
Utility
c0q2zmvqzjku25dzu0oga3zlbs88da6gidwls0p5v6u00m88
4 Jan 24
The semiconductor device has the main surface, the semiconductor substrate having the first impurity region formed on the main surface, the first electrode formed on the main surface having the first impurity region, the insulating film formed on the main surface such that surround the first electrode, the second electrode formed on the insulating film such that spaced apart from the first electrode and annularly surround the first electrode, and the semi-insulating film.
Kodai OZAWA, Sho NAKANISHI
Filed: 19 Sep 23
Utility
0t8lqzb2dvxhe24b47sf9b
4 Jan 24
A cryptographic key installation method of installing a customer key in a semiconductor device, wherein the semiconductor device includes a decryption functional unit that has a secret key installed therein in advance, and when the customer key encrypted by a public key corresponding to the secret key is installed, decrypts the encrypted customer key by the secret key installed in advance to generate a customer key, wherein an encryption device on a user side that uses the semiconductor device encrypts the customer key by the public key, and generates the encrypted customer key, and wherein a key installation device on the user side installs the encrypted customer key in the semiconductor device.
Takashi KITAGAWA
Filed: 26 May 23
Utility
jxyrw2dgo71klwaijg74zxa7yrvzo1 yzhfsfut58y6tpnb8
4 Jan 24
A semiconductor manufacturer generates a manufacturer encryption key and a manufacturer decryption key corresponding to the manufacturer decryption key, installs the manufacturer decryption key in a semiconductor device, and provides a customer with the manufacturer decryption key, the customer generates a customer encryption key and a customer decryption key corresponding to the customer decryption key, decrypts, by the customer decryption key, a customer key to be installed in the semiconductor device, and supplies the encrypted customer key to the semiconductor manufacturer, the semiconductor manufacturer encrypts the supplied customer key by the manufacturer encryption key without decryption, and supplies the encrypted customer key to the customer, the customer decrypts the customer key by the customer decryption key, and installs the decrypted customer key in the semiconductor device, and in the semiconductor device, the installed customer key is decrypted by the manufacturer decryption key installed by the semiconductor manufacturer.
Takashi KITAGAWA
Filed: 18 May 23
Utility
dl3y1vi3g9549co5uqc1 i8z4brqi4jzqauf
2 Jan 24
A test apparatus includes a test board, a unit, and a probe pin housed in the unit.
Fukumi Unokuchi, Toshitsugu Ishii
Filed: 23 Feb 22
Utility
039f1fdh1qzqeho6uraeh4ur3f8hysdb4nqqoei8nl1s
28 Dec 23
A semiconductor device includes a trench emitter electrode located at a boundary between one end of an active cell region and an inactive cell region, a trench gate electrode located at a boundary between the other end of the active cell region and the inactive cell region, an end trench gate electrode connected to one end of the trench gate electrode, and an end trench emitter electrode connected to one end of the trench emitter electrode.
Seigo NAMIOKA, Hitoshi MATSUURA, Ryota KURODA
Filed: 7 Mar 23
Utility
w8yyiql2yrhmpi8xp8y72d7xv8w996 a9wnh1
28 Dec 23
An improved power MOSFET of a split gate structure including a gate electrode and a field plate electrode in a trench is disclosed.
Yuya ABIKO, Takahiro MARUYAMA
Filed: 7 Mar 23
Utility
o1elc0iyp dp6vtqnbbzliap
21 Dec 23
A first P-type transistor and a second P-type transistor are connected in series between a power supply terminal and an output terminal.
Koji TAKAYANAGI
Filed: 8 Jun 23