10908 patents
Page 40 of 546
Utility
Multi-die, vertical-wire package-in-package apparatus, and methods of making same
5 Sep 23
A vertical-wire package-in-package includes at least two memory-die stacks that form respective memory modules that are stacked vertically on a bond-wire board.
Hyoung Il Kim, Florence R. Pon, Yi Elyn Xu
Filed: 28 Dec 17
Utility
Sacrificial redistribution layer in microelectronic assemblies having direct bonding
5 Sep 23
Microelectronic assemblies, related devices and methods, are disclosed herein.
Adel A. Elsherbini, Veronica Aleman Strong, Shawna M. Lift, Brandon M. Rawlings, Jagat Shakya, Johanna M. Swan, David M. Craig, Jeremy Alan Streifer, Brennen Karl Mueller
Filed: 9 Nov 22
Utility
wske51ks6zyrlo yf0w50zgqyeuv7azma09n5lj6c4sraokc72mvms8f
5 Sep 23
Microelectronic assemblies, and related devices and methods, are disclosed herein.
Adel A. Elsherbini, Amr Elshazly, Arun Chandrasekhar, Shawna M. Liff, Johanna M. Swan
Filed: 28 Mar 22
Utility
zdw3gjpy7w95ft84w6a rj0ko1e8z
5 Sep 23
Composite IC chip including a chiplet embedded within metallization levels of a host IC chip.
Adel Elsherbini, Johanna Swan, Shawna Liff, Patrick Morrow, Gerald Pasdast, Van Le
Filed: 11 Aug 21
Utility
vt2c5yuagu8pzszkqxmxxguy2dpnd86e0 pzpoawpajvculc4yv
5 Sep 23
A multi-chip unit suitable for chip-level packaging may include multiple IC chips that are interconnected through a metal redistribution structure, and that are directly bonded to an integrated heat spreader.
Debendra Mallik, Ravindranath Mahajan, Digvijay Raorane
Filed: 27 Dec 22
Utility
xuw3fgcc6847bh3hg1ka5t0s8f5x8
5 Sep 23
An integrated circuit assembly may be formed comprising an electronic substrate, at least one integrated circuit device electrically attached to the electronic substrate, a mold material layer abutting electronic substrate and substantially surrounding the at least one integrated circuit, and at least one structure within the mold material layer, wherein the at least one structure comprises a material having a modulus of greater than about 20 gigapascals and a thermal conductivity of greater than about 10 watts per meter-Kelvin.
Yiqun Bai, Vipul Mehta, John Decker, Ziyin Lin
Filed: 28 Feb 20
Utility
cjf698y3ve0k6v4meiewffdqd167md232wrwha9 dtfu7arega9b
5 Sep 23
Disclosed herein are isolation regions in integrated circuit (IC) structures, as well as related methods and components.
Guillaume Bouche, Sean T. Ma, Andy Chih-Hung Wei
Filed: 6 Apr 22
Utility
aec77ycpdfnxerj7z73mrzak842w9m
5 Sep 23
Disclosed herein are quantum dot devices, as well as related computing devices and methods.
Hubert C. George, Ravi Pillarisetty, Lester Lampert, James S. Clarke, Nicole K. Thomas, Roman Caudillo, David J. Michalak, Jeanette M. Roberts
Filed: 28 Sep 18
Utility
wyc8ou5wn5i6cvj2wxlhh45bz0 hqcbh2d8
5 Sep 23
On-die termination (ODT) is triggered through a serial signal encoding on an ODT signal line instead of a simple binary enable signal.
Sheldon G. Hiemstra, Veeresh Garag
Filed: 14 Dec 20
Utility
ymcmauutumtunldr20auji7ryfc
5 Sep 23
A digital-to-analog converter is provided.
Franz Kuttner
Filed: 26 Feb 20
Utility
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5 Sep 23
An apparatus to facilitate telemetry targeted query injection for enhanced debugging in microservices architectures is disclosed.
Rajesh Poornachandran, Marcos Carranza
Filed: 16 Dec 22
Utility
kddewugy6ngqyqzpe1ttq7z9rnz9bze5mauko zh9ydhpel
5 Sep 23
An optical network receiver (ONU) circuit associated with a passive optical network (PON) is disclosed.
Rainer Strobel, Gert Schedelbeck
Filed: 10 Dec 20
Utility
ufkdyh5z0mfpj2g6cmv5xyrzlj
5 Sep 23
In one example an apparatus comprises a computer readable memory, a signing facility comprising a plurality of hardware security modules, and a state synchronization manager comprising processing circuitry to select, from the plurality of hardware security modules, a set of hardware security modules to be assigned to a digital signature process, the set of hardware security modules comprising at least a first hardware security module and a second hardware module, and assign a set of unique state synchronization counter sequences to the respective set of hardware security modules, the set of state synchronization counter sequences comprising at least a first state synchronization counter sequence and a second state synchronization counter sequence.
Manoj Sastry, Rafael Misoczki, Jordan Loney, David M. Wheeler
Filed: 29 Jul 22
Utility
dqo2m464rx87i2d2tqvfgcr3ou1fngtasxsipnz7cu8lg
5 Sep 23
Technologies for protocol execution include a command device to broadcast a protocol message to a plurality of computing devices and receive an aggregated status message from an aggregation system.
Matthias Schunter
Filed: 16 Aug 21
Utility
ha77w581mncnxac7ogivpdf3jfad34584j6jgaq4eq7szxgqv19ykb
5 Sep 23
There is disclosed an example of a computing apparatus for providing a hardware-assisted virtual switch on a host, including: a hardware virtual switch (vSwitch) circuit; and a hardware virtual host (vHost) circuit, the vHost circuit having an interface driver specific to the hardware vSwitch and configured to provide a vHost data plane to: provide a plurality of hardware queues to communicatively couple the hardware vSwitch to a guest virtual function (VF); and present to a virtual network driver of the guest VF an interface that is backward compatible with a software network interface.
Daniel P. Daly, Cunming Liang, Jian Wang, Martin Roberts, Shih-Wei Chien, Gerald Alan Rogers
Filed: 24 Oct 17
Utility
h89uzfmw7om1obfj6ucxiwxz30rc58c2
5 Sep 23
This disclosure describes systems, methods, and devices related to enhanced constellation shaping.
Yaron Yoffe, Assaf Gurevitz, Elad Meir, Shlomi Vituri, Qinghua Li, Feng Jiang, Xiaogang Chen
Filed: 3 Dec 20
Utility
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5 Sep 23
In one example an apparatus comprises a computer readable memory, a signature logic to generate a signature to be transmitted in association with a message, the signature logic to apply a hash-based signature scheme to the message using a private key to generate the signature comprising a public key, or a verification logic to verify a signature received in association with the message, the verification logic to apply the hash-based signature scheme to verify the signature using the public key, and an accelerator logic to apply a structured order to at least one set of inputs to the hash-based signature scheme.
Vikram Suresh, Sanu Mathew, Manoj Sastry, Santosh Ghosh, Raghavan Kumar, Rafael Misoczki
Filed: 23 Nov 21
Utility
46jmfcyvqrqyruxdcgfqffd6fgbkk7k1npmt4m232 8gqb68oai
22 Aug 23
Volumetric resistance blowers are disclosed herein.
David Kennedy, Ruander Cardenas, Mark MacDonald, James Raupp
Filed: 13 Sep 21
Utility
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22 Aug 23
Visually distinguishable robots and methods to manufacture the same are disclosed.
Robert Vaughn
Filed: 27 Mar 18
Utility
81bmp96wxugn5coradxq7jhudqg eaid4td3fe4rp113dem9ad9
22 Aug 23
A memory device includes a first electrode, a conductive layer including iridium above the first electrode and a magnetic junction directly on the conductive layer.
Daniel Ouellette, Christopher Wiegand, Justin Brockman, Tofizur Rahman, Oleg Golonzka, Angeline Smith, Andrew Smith, James Pellegren, Michael Robinson, Huiying Liu
Filed: 27 Mar 19