134 patents
Page 4 of 7
Utility
Flash memory cell and associated high voltage row decoder
22 Feb 22
The present invention relates to a flash memory cell with only four terminals and a high voltage row decoder for operating an array of such flash memory cells.
Hieu Van Tran, Anh Ly, Thuan Vu
Filed: 23 Apr 21
Utility
Wear leveling in EEPROM emulator formed of flash memory cells
22 Feb 22
The present invention relates to systems and methods for implementing wear leveling in a flash memory device that emulates an EEPROM.
Guangming Lin, Xiaozhou Qian, Xiao Yan Pi, Vipin Tiwari, Zhenlin Ding
Filed: 28 Aug 20
Utility
Method of improving read current stability in analog non-volatile memory cells by screening memory cells
21 Dec 21
A memory device that includes a plurality of non-volatile memory cells and a controller.
Viktor Markov, Alexander Kotov
Filed: 24 Mar 20
Utility
Anti-hacking mechanisms for flash memory device
30 Nov 21
Multiple embodiments are disclosed for enhancing security and preventing hacking of a flash memory device.
Hieu Van Tran, Vipin Tiwari, Nhan Do
Filed: 20 Dec 18
Utility
Method of making embedded memory device with silicon-on-insulator substrate
23 Nov 21
A method of forming a semiconductor device where memory cells and some logic devices are formed on bulk silicon while other logic devices are formed on a thin silicon layer over insulation over the bulk silicon of the same substrate.
Jinho Kim, Xian Liu, Feng Zhou, Parviz Ghazavi, Steven Lemke, Nhan Do
Filed: 27 Aug 20
Utility
Temperature compensation for memory cells in an analog neural memory system used in a deep learning neural network
26 Oct 21
Numerous embodiments are disclosed for providing temperature compensation in a an analog memory array.
Hieu Van Tran, Steven Lemke, Nhan Do, Vipin Tiwari, Mark Reiten
Filed: 16 Jul 20
Utility
Algorithms and circuitry for verifying a value stored during a programming operation of a non-volatile memory cell in an analog neural memory in deep learning artificial neural network
12 Oct 21
Various algorithms are disclosed for verifying the stored weight in a non-volatile memory cell in a neural network following a multilevel programming operation of the non-volatile memory cell by converting the stored weight into a plurality of digital output bits.
Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Anh Ly
Filed: 21 Mar 19
Utility
Charge pump for use in non-volatile flash memory devices
14 Sep 21
Numerous embodiments of an improved charge pump design are disclosed for generating the high voltages necessary to perform erase and program operations in non-volatile flash memory devices.
Hieu Van Tran, Anh Ly, Thuan Vu, Kha Nguyen, Hien Pham, Stanley Hong, Stephen T. Trinh
Filed: 20 Oct 20
Utility
Method of forming a device with FinFET split gate non-volatile memory cells and FinFET logic devices
7 Sep 21
A method of forming a device with a silicon substrate having upwardly extending first and second fins.
Feng Zhou, Xian Liu, JinHo Kim, Serguei Jourba, Catherine Decobert, Nhan Do
Filed: 27 Feb 20
Utility
Decoders for analog neural memory in deep learning artificial neural network
10 Aug 21
Numerous embodiments of decoders for use with a vector-by-matrix multiplication (VMM) array in an artificial neural network are disclosed.
Hieu Van Tran, Stanley Hong, Anh Ly, Thuan Vu, Hien Pham, Kha Nguyen, Han Tran
Filed: 29 May 18
Utility
Method of forming split gate memory cells
3 Aug 21
A method of forming a memory device includes forming a second insulation layer on a first conductive layer formed on a first insulation layer formed on semiconductor substrate.
Leo Xing, Chunming Wang, Guo Yong Liu, Melvin Diao, Xian Liu, Nhan Do
Filed: 6 May 20
Utility
Non-volatile memory device with stored index information
27 Jul 21
A memory device that includes a memory array having pluralities of non-volatile memory cells, a plurality of index memory cells each associated with a different one of the pluralities of the non-volatile memory cells, and a controller.
Xiaozhou Qian, Xiao Yan Pi, Vipin Tiwari
Filed: 9 Mar 20
Utility
Programming circuit and method for flash memory array
20 Jul 21
An improved method and apparatus for programming advanced nanometer flash memory cells is disclosed.
Hieu Van Tran, Anh Ly, Thuan Vu, Hung Quoc Nguyen
Filed: 17 Sep 19
Utility
Low voltage level shifter for integrated circuit
15 Jun 21
An improved level shifter is disclosed.
Ryan Mei, Xiaozhou Qian, Hieu Van Tran, Claire Zhu
Filed: 2 Apr 20
Utility
Power line compensation for flash memory sense amplifiers
8 Jun 21
In one aspect, the invention concerns a memory system that compensates for power level variations in sense amplifiers for multilevel memory.
Hieu Van Tran
Filed: 30 Jul 19
Utility
Method of improving read current stability in analog non-volatile memory using final bake in predetermined program state
25 May 21
A method of improving stability of a memory device having a controller configured to program each of a plurality of non-volatile memory cells within a range of programming states bounded by a minimum program state and a maximum program state.
Viktor Markov, Alexander Kotov
Filed: 27 Feb 20
Utility
Method of forming split gate memory cells with thinned tunnel oxide
25 May 21
A method of forming a memory device includes forming a floating gate on a memory cell area of a semiconductor substrate, having an upper surface terminating in an edge.
Jinho Kim, Elizabeth Cuevas, Parviz Ghazavi, Bernard Bertello, Gilles Festes, Catherine Decobert, Yuri Tkachev, Bruno Villard, Nhan Do
Filed: 4 Feb 20
Utility
Flash memory cell and associated high voltage row decoder
18 May 21
The present invention relates to a flash memory cell with only four terminals and a high voltage row decoder for operating an array of such flash memory cells.
Hieu Van Tran, Anh Ly, Thuan Vu
Filed: 20 May 20
Utility
Memory cell with floating gate, coupling gate and erase gate, and method of making same
4 May 21
A memory device that includes source and drain regions formed in a semiconductor substrate, with a first channel region of the substrate extending there between.
Catherine Decobert, Hieu Van Tran, Nhan Do
Filed: 3 Dec 18
Utility
Method of improving read current stability in analog non-volatile memory by limiting time gap between erase and program
27 Apr 21
A memory device having non-volatile memory cells and a controller.
Viktor Markov, Alexander Kotov
Filed: 27 Feb 20