805 patents
Page 3 of 41
Utility
Debug methodology for a USB sub-system using unique identifier (UID) approach
7 Nov 23
A method for debugging an electronic subsystem is disclosed.
Jishnu De, Jaspreet Singh Gambhir
Filed: 31 Aug 21
Utility
On-chip Automation of Clock-to-q Access Time Measurement of a Memory Device
2 Nov 23
An integrated circuit (IC) may include a memory device and a circuit coupled with the memory device.
Thomas B. Chadwick, JR.
Filed: 25 Apr 23
Utility
Satisfiability-based Resubstitution for Incremental Mapped Optimization
2 Nov 23
Embodiments herein describe selecting a gate in a mapped network and then un-mapping the gate from a library cell into a Boolean expression.
Vinicius NEVES POSSANI, Luca Gaetano AMARU, Patrick Emmanuel VUILLOD
Filed: 27 Apr 23
Utility
Detecting Instability In Combinational Loops In Electronic Circuit Designs
2 Nov 23
A method includes: loading a circuit design including a plurality of combinational elements and controlled by a user clock; detecting strongly connected components (SCCs) corresponding to the plurality of combinational elements in the circuit design; inserting a plurality of break registers into the circuit design, each break register being between two combinational elements of a corresponding SSC of the SCCs to break the corresponding SCC, the plurality of break registers being clocked by a relaxation clock; detecting, by a processor, during an emulation run of the circuit design, one or more value mismatches across an input pin and an output pin of one or more break registers of the plurality of break registers based on a relaxation cycle of the relaxation clock, the one or more break registers being associated with one or more SCCs exhibiting instability; and reporting an instability event based on the one or more value mismatches.
Srivatsan RAGHAVAN, Vinod CHANDRASEKARAN, Mikhail BERSHTEYN
Filed: 29 Apr 22
Utility
Freeform optical surface and method of forming a freeform optical surface
31 Oct 23
A freeform optical surface includes, in part, an off-axis optical surface and a departure optical module.
John Rice Rogers, Bryan D. Stone
Filed: 14 May 20
Utility
Waveform Based Reconstruction for Emulation
26 Oct 23
A process is disclosed to identify the minimal set of sequential and combinational signals needed to fully reconstruct the combinational layout after emulation is complete.
Gagan Vishal Jain, Johnson Adaikalasamy, Alexander John Wakefield, Ritesh Mittal, Solaiman Rahim, Olivier Coudert
Filed: 27 Jun 23
Utility
Compiler-based code generation for post-silicon validation
24 Oct 23
Embodiments relate to a system, program product, and method for integrating compiler-based testing in post-silicon validation.
Hillel Mendelson, Tom Kolan, Shay Aviv, Vitali Sokhin, Wesam Saleem Ibraheem
Filed: 26 May 21
Utility
Endpoint path margin based integrated circuit design using sub-critical timing paths
24 Oct 23
Techniques for integrated circuit (IC) design are disclosed.
Deyuan Guo, Kailash Pawar
Filed: 18 Sep 21
Utility
Regression testing based on overall confidence estimating
24 Oct 23
A method of testing a product using confidence estimates is provided.
Boris Gommershtadt, Leonid Greenberg, Ilya Kudryavtsev, Yaron Shkedi
Filed: 5 Mar 21
Utility
Finding equivalent classes of hard defects in stacked MOSFET arrays
24 Oct 23
This disclosure describes a method for finding equivalent classes of hard defects in a stacked MOSFET array.
Mayukh Bhattacharya, Michal Jerzy Rewienski, Shan Yuan, Michael Durr, Chih Ping Antony Fan
Filed: 12 Aug 21
Utility
Power aware real number modeling in dynamic verification of mixed-signal integrated circuit design
24 Oct 23
A method includes: receiving a representation of a mixed-signal integrated circuit design including an analog circuit portion and a digital circuit portion including a plurality of descriptions of a power supply, the descriptions including a power supply network description and a register transfer level (RTL) hardware description language (HDL) description; determining a mismatch between the power supply network description and the HDL description of the power supply; generating a value converter to convert a voltage value associated with the power supply between the power supply network description and the HDL description; and converting, by a processor, between the power supply network description and the HDL description during runtime using the value converter to synchronize the power supply network description and the HDL description of the power supply responsive to the mismatch.
Diganchal Chakraborty, Jiri Prevratil, Harsh Chilwal, Shreedhar Ramachandra, Prasenjit Biswas
Filed: 22 Dec 21
Utility
Scalable supply multiplexer circuit
24 Oct 23
A circuit to multiplex supply voltages may include a set of chains of transistors.
Akshay Adlakha, Hiten Advani
Filed: 3 Dec 21
Utility
System for Making Circuit Design Changes
19 Oct 23
A system and method for changing a circuit design are described.
Zuo DAI, Konstantinos TSIROGIANNIS, Tao HUANG, Jaehan JEON, Tobias BJERREGAARD, Tao LIN, Min PAN
Filed: 19 Apr 22
Utility
Radio-frequency loss reduction for integrated devices
17 Oct 23
In radio-frequency (RF) devices integrated on semiconductor-on-insulator (e.g., silicon-based) substrates, RF losses may be reduced by increasing the resistivity of the semiconductor device layer in the vicinity of (e.g., underneath and/or in whole or in part surrounding) the metallization structures of the RF device, such as, e.g., transmission lines, contacts, or bonding pads.
John Sonkoly, Erik Johan Norberg
Filed: 16 Sep 21
Utility
Single-pass diagnosis for multiple chain defects
17 Oct 23
Disclosed herein are method, system, and storage-medium embodiments for single-pass diagnosis of multiple chain defects in circuit-design testing.
Emil Gizdarski
Filed: 13 Mar 20
Utility
Optical and thermal interface for photonic integrated circuits
17 Oct 23
Described herein are photonic systems and devices including a optical interface unit disposed on a bottom side of a photonic integrated circuit (PIC) to receive light from an emitter of the PIC.
Gregory Alan Fish, Brian R. Koch
Filed: 16 Sep 21
Utility
Placement and simulation of cell in proximity to cell with diffusion break
17 Oct 23
A system and method for placement and simulation of a cell in proximity to a cell with a diffusion break is herein disclosed.
Deepak Dattatraya Sherlekar, Shanie George
Filed: 14 Jun 22
Utility
Full correlation aging analysis over combined process voltage temperature variation
17 Oct 23
A method, a system, and non-transitory computer readable medium for aging analysis are provided.
Donald John Oriordan
Filed: 11 May 20
Utility
Path Margin Monitor Integration with Integrated Circuit
12 Oct 23
The timing margin of various signal paths in an integrated circuit is monitored by components on the integrated circuit itself.
Firooz Massoudi
Filed: 12 Apr 22
Utility
Determining the Location of Safety Mechanism Within a Circuit Design
12 Oct 23
A system and method for determining the location of safety mechanisms to be placed within a circuit design by receiving a circuit design and a safety relevant input.
Shivakumar Shankar CHONNAD
Filed: 6 Apr 23