229 patents
Utility
Crystal Growing Method for Crystals
11 Jan 24
A crystal growing method for crystals include the following steps.
Ching-Shan Lin
Filed: 30 Jun 23
Utility
Crystal Growth Method and Wafer
11 Jan 24
A crystal growth method, including providing a seed crystal in a crystal growth furnace, and forming a crystal on the seed crystal along a first direction after multiple time points, is provided.
Ching-Shan Lin, Ye-Jun Wang, Chien-Cheng Liou
Filed: 30 Jun 23
Utility
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11 Jan 24
A crystal growth furnace system, including an external heating module, a furnace, a first driven device, a second driven device, and a control device, is provided.
Ching-Shan Lin, Ye-Jun Wang, Chien-Cheng Liou
Filed: 30 Jun 23
Utility
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11 Jan 24
A method of growing the silicon carbide crystal includes the following steps.
Ching-Shan Lin
Filed: 30 Jun 23
Utility
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11 Jan 24
A silicon carbide crystal and a silicon carbide wafer, wherein a monocrystalline proportion of the silicon carbide crystal and the silicon carbide wafer is 100%, the resistivity thereof is in a range of 15 mΩ·cm to 20 mΩ·cm, and a deviation of an uniformity of the resistivity thereof is less than 0.4%.
Ching-Shan Lin
Filed: 30 Jun 23
Utility
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4 Jan 24
A measurement system includes a target object at least partially visible through an opening in a crystal puller.
Richard Joseph Phillips
Filed: 27 Jun 23
Utility
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4 Jan 24
A susceptor for supporting a semiconductor wafer in a heated chamber includes a body that has a front surface, a rear surface, and a central plane between the front and rear surfaces.
Manabu Hamano, Chun-Chin Tu
Filed: 1 Jun 23
Utility
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7 Dec 23
Systems and methods for controlling the surface profiles of wafers sliced in a wire saw machine.
Sumeet S. Bhagavat, Carlo Zavattari, Peter D. Albrecht, William L. Luter
Filed: 1 Jun 23
Utility
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7 Dec 23
A graphite susceptor for supporting a quartz crucible during a crystal growth process includes a body having an interior surface and a coating deposited onto the interior surface.
Richard J. Phillips, William Luter, Carissima Marie Hudson, JaeWoo Ryu
Filed: 31 May 23
Utility
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23 Nov 23
A heterostructure, includes: a substrate; and a buffer layer that includes a plurality of layers having a composition AlxInyGa1-x-yN, where x≤1 and 0≤y≤1; wherein the buffer layer has a first region that includes at least two layers, a second region that includes at least two layers, and a third region that includes at least two layers.
Jia-Zhe Liu, Chih-Yuan Chuang, Po Jung Lin, Hong Che Lin
Filed: 14 Jul 23
Utility
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16 Nov 23
A method of manufacturing a high electron mobility transistor (HEMT) structure is disclosed.
JIA-ZHE LIU, TZU-YAO LIN
Filed: 3 Apr 23
Utility
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9 Nov 23
A method of manufacturing an epitaxial structure includes steps of: A: provide a silicon carbide (SiC) substrate, wherein a silicon face (Si-face) of the SiC substrate is taken as a growth face having an off-angle relative to the Si-face of the SiC substrate; B: deposit a nitride angle adjustment layer having a thickness less than 50 nm on the growth face of the SiC substrate through physical vapor deposition (PVD); C: deposit a first group III nitride layer on the nitride angle adjustment layer; and D: deposit a second group III nitride layer on the first group III nitride layer.
PO-JUNG LIN, HAN-ZONG WU
Filed: 1 Feb 23
Utility
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9 Nov 23
A method of manufacturing an epitaxial structure includes steps of: A: provide a silicon carbide (SiC) substrate, wherein a silicon face (Si-face) of the SiC substrate is taken as a growth face, and the growth face has an off-angle relative to the Si-face of the SiC substrate; B: deposit a nitride angle adjustment layer on the growth face of the SiC substrate through physical vapor deposition (PVD); C: deposit a first group III nitride layer on the nitride angle adjustment layer; and D: deposit a second group III nitride layer on the first group III nitride layer.
PO-JUNG LIN, HAN-ZONG WU
Filed: 1 Feb 23
Utility
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9 Nov 23
A method of manufacturing an epitaxial structure includes steps of: A: provide a silicon nitride (SiC) substrate having a carbon face (C-face) without an off-angle; B: form an amorphous structure layer on the C-face of the SiC substrate; C: deposit a first group III nitride layer on the amorphous structure layer; and D: deposit a second group III nitride layer on the first group III nitride layer.
PO-JUNG LIN, HAN-ZONG WU
Filed: 1 Feb 23
Utility
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2 Nov 23
A method for collecting dust from a single crystal growth system includes providing dry air and oxygen into an exit pipe connecting to the single crystal growth system, blowing a first inert gas into the exit pipe to compel the dust oxide toward a dust collecting device, collecting the dust oxide by the dust collecting device; and providing a rotary pump to transport residues of the dust oxide backward.
Masami Nakanishi, YU-SHENG SU, I-CHING LI
Filed: 3 Jul 23
Utility
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2 Nov 23
Cleaning tools for cleaning the pull cable of an ingot puller apparatus and methods for cleaning the pull cable are disclosed.
Chin-Hung Ho, Chih-Kai Cheng, Chen-Yi Lin, Feng-Chien Tsai, Tung-Hsiao Li, YoungGil Jeong, Jin Yong Uhm
Filed: 14 Apr 23
Utility
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2 Nov 23
A polishing assembly for polishing of silicon wafers includes a polishing pad, a polishing head assembly, a temperature sensor, and a controller.
Emanuele Corsi, Ezio Bovio
Filed: 1 Jun 23
Utility
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2 Nov 23
A method of manufacturing a semiconductor wafer in a reaction apparatus includes channeling a process gas into a reaction chamber of the reaction apparatus, heating the semiconductor wafer with a high intensity lamp positioned below the reaction chamber, blocking radiant heat from the high intensity lamp from heating a center region of the semiconductor wafer with a cap positioned on a shaft within the reaction chamber, the cap including a tube and a disc attached to the tube, where the disc generates a uniform temperature distribution on the semiconductor wafer, and depositing a layer on the semiconductor wafer with the process gas, where the uniform temperature distribution forms a uniform thickness of the layer on the semiconductor wafer.
Chieh Hu, Chun-Chin Tu, Lunghsing Hsu
Filed: 12 Jul 23
Utility
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26 Oct 23
A semiconductor structure includes a silicon carbide (SiC) substrate, a nucleation layer and a gallium nitride (GaN) layer.
Po Jung Lin, Jia-Zhe Liu
Filed: 10 Apr 23
Utility
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26 Oct 23
Methods for forming single crystal silicon ingots with improved resistivity control are disclosed.
Carissima Marie Hudson, HyungMin Lee, JaeWoo Ryu, Richard J. Phillips, Robert Wendell Standley
Filed: 28 Jun 23