1577 patents
Page 77 of 79
Utility
Method of Manufacturing a Semiconductor Device
13 Nov 19
Reliability of a semiconductor device is improved.
Noriaki MINETA
Filed: 14 Apr 19
Utility
Semiconductor Device and Method of Manufacturing the Same
13 Nov 19
The semiconductor device includes a fin FA selectively protruded from an upper surface of a semiconductor substrate SB, a gate insulating film GF1 formed on an upper surface and a side surface of the fin FA and having an insulating film X1 and a charge storage layer CSL, and a memory gate electrode MG formed on the gate insulating film GF1.
Shibun TSUDA
Filed: 14 Apr 19
Utility
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13 Nov 19
In a MONOS memory having an ONO film, dielectric breakdown and a short circuit are prevented from occurring between the end of the lower surface of a control gate electrode over the ONO film and a semiconductor substrate under the ONO film.
Hideaki YAMAKOSHI, Takashi HASHIMOTO, Shinichiro ABE, Yuto OMIZU
Filed: 23 Jul 19
Utility
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13 Nov 19
A semiconductor device using an SOI (Silicon On Insulator) substrate, capable of preventing malfunction of MISFETs (Metal Insulator Semiconductor Field Effect Transistor) and thus improving the reliability of the semiconductor device.
Yoshiki Yamamoto
Filed: 23 Jul 19
Utility
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13 Nov 19
Resistance of a gate electrode is reduced in a split gate MONOS memory configured by a fin FET.
Tomohiro YAMASHITA
Filed: 22 Jul 19
Utility
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11 Nov 19
A microcomputer is provided for each of industrial apparatuses to synchronously control them and includes a CPU, a peripheral module, and a communication interface.
Shinichi Suzuki, Yuichi Takitsune
Filed: 12 Feb 18
Utility
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11 Nov 19
Provided is a semiconductor storage device including: first memory cells; first word lines; first bit lines; a first common bit line; second memory cells; second word lines; second bit lines; a second common bit line; a first selection circuit that connects the first common bit line to a first bit line selected from the first bit lines; a second selection circuit that connects the second common bit line to a second bit line selected from the second bit lines; a word line driver that activates any one of the first and second word lines; a reference current supply unit that supplies a reference current to a common bit line among the first and second common bit lines, the common bit line not being electrically connected to a data read target memory cell; and a sense amplifier that amplifies a potential difference between the first and second common bit lines.
Makoto Yabuuchi
Filed: 25 May 17
Utility
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11 Nov 19
The reliability of a semiconductor device is improved.
Shigeaki Saito, Yoshito Nakazawa, Hitoshi Matsuura, Yukio Takahashi
Filed: 3 May 18
Utility
826mojdf66gfpkud8otftlwe3cvyqjp9sjyt
11 Nov 19
In a semiconductor device, a width of a second epitaxial layer is greater than a width of a first epitaxial layer, and a thickness of an end portion of the second epitaxial layer, which is in contact with an element isolation portion, is smaller than a thickness of an end portion of the first epitaxial layer, which is in contact with the element isolation portion, and a second shortest distance between the element isolation portion and a second plug is greater than a first shortest distance between the element isolation portion and a first plug.
Masaru Kadoshima, Masahiko Fujisawa
Filed: 9 Dec 17
Utility
9ehtpgj8kmkq5304bybeggkwax1
11 Nov 19
Performance of a semiconductor device is improved without increasing an area size of a semiconductor chip.
Tohru Kawai, Yasutaka Nakashiba, Yutaka Akiyama
Filed: 30 Jan 19
Utility
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11 Nov 19
A PLL circuit includes a phase comparator, first and second charge pumps, a filter generating a first control voltage from a current of the first charge pump, a comparator comparing a voltage of a first node with a reference voltage, a switch section outputting the reference voltage to the first node and outputting a current of the second charge pump to a second node in a high-speed lock mode, and outputting the current of the second charge pump to the first node and outputting a result from the comparator to the second node in a normal lock mode, a second filter generating a second control voltage by integrating a current of the first node, a third filter generating a third control voltage by integrating a current of the second node, and a voltage controlled oscillator generating a clock signal of a frequency corresponding to the first to third control voltages.
Yasuyuki Hiraku
Filed: 16 Jan 19
Utility
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6 Nov 19
A power control circuit according to one embodiment includes an H-bridge circuit formed using a plurality of power transistors.
Shunichi KAERIYAMA
Filed: 15 Jul 19
Utility
xm9dji0awzf3rqd57jaot5oelm sid9ovz0t6s3m6hyfl8h6vx57s3r
6 Nov 19
To securely realize updating of a key shared between an apparatus on a transmission side and an apparatus on a reception side.
Tadaaki TANIMOTO, Daisuke MORIYAMA
Filed: 9 Apr 19
Utility
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6 Nov 19
A health support system that facilitates estimation of a user's health condition status and improvement of the health condition status is constructed.
Shoichi HAMADA, Kakeru KIMURA, Hirohisa IMAMURA, Koji HIRANO
Filed: 9 Apr 19
Utility
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6 Nov 19
Reliability of a semiconductor device is improved.
Naoki FUJITA, Hiroyuki NAKAMURA
Filed: 9 Apr 19
Utility
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6 Nov 19
A method for manufacturing a semiconductor device to provide a Metal Insulator Semiconductor Field Effect Transistor (MISFET) in a first region of a semiconductor substrate includes forming a first gate insulating film on the semiconductor substrate in the first region, forming a first gate electrode containing silicon on the first gate insulating film, forming first impurity regions inside the semiconductor substrate so as to sandwich the first gate electrode in the first region, the first impurity regions configuring a part of a first source region and a part of a first drain region, forming a first silicide layer on the first impurity region, forming a first insulating film on the semiconductor substrate so as to cover the first gate electrode and the first silicide layer, polishing the first insulating film so as to expose the first gate electrode, and forming a second silicide layer on the first gate electrode.
Tadashi YAMAGUCHI
Filed: 17 Jul 19
Utility
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4 Nov 19
Performance of a semiconductor device is enhanced.
Hiroya Shimoyama, Hiroyuki Nakamura
Filed: 28 Jul 18
Utility
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4 Nov 19
A semiconductor device includes: a first conductivity type semiconductor substrate made of silicon carbide; a second conductivity type body region in a device region of the semiconductor substrate; a first conductivity type source region formed in the body region; and a gate electrode formed on the body region through gate insulating films.
Kenichi Hisada, Koichi Arai
Filed: 22 Oct 17
Utility
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4 Nov 19
A recessed portion is formed in a top surface of an isolation insulation film filling an isolation trench between a p+ source region and a p+ drain region.
Hiroki Fujii, Takahiro Mori
Filed: 18 Dec 17
Utility
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4 Nov 19
Provided is a cryptographic communication system including a first semiconductor device and a second semiconductor device.
Shigemasa Shiota, Shigeru Furuta, Masayuki Hirokawa, Akira Yamazaki, Daisuke Oshida
Filed: 13 Feb 17