186 patents
Page 4 of 10
Utility
Reversible Multi-Bit Scan Cell-based Scan Chains For Improving Chain Diagnostic Resolution
4 Feb 21
A circuit comprises a scan chain comprising one or more multi-bit flip-flops, a plurality of multiplexers, and new scan enable signal generation circuitry.
Wu-Tung Cheng, Szczepan Urban, Jakub Janicki, Manish Sharma, Yu Huang
Filed: 20 Jul 20
Utility
Systems and methods for patterning color assignment
2 Feb 21
Systems and methods for multi-patterning in layout design data.
Fedor G. Pikus
Filed: 20 Apr 18
Utility
Flexible Isometric Decompressor Architecture for Test Compression
21 Jan 21
A system for testing a circuit comprises scan chains, a controller, and hold-toggle circuitry.
Janusz Rajski, Yu Huang, Sylwester Milewski, Jerzy Tyszer
Filed: 21 Mar 19
Utility
Fabric-independent multi-patterning
19 Jan 21
Disclosed systems and methods may support fabric-independent multi-patterning.
Fedor G. Pikus
Filed: 16 May 19
Utility
Determination of structure function feature correlation to thermal model element layers
19 Jan 21
A thermal transient response simulation is performed to determine a total thermal resistance value for a structure having a plurality of thermal model elements.
Joseph Charles Proulx, Byron Blackmore, Robin Bornoff, Andras Vass-Varnai
Filed: 24 Oct 17
Utility
Electrical energy management of a vehicle system of a motor vehicle
12 Jan 21
A device for electrical energy management of a vehicle system of a motor vehicle includes a power supply for supplying energy to the vehicle system of the motor vehicle.
Daniel Franze, Carsten Schmid, Georg Spoerlein, Reiner Striebel
Filed: 20 Dec 17
Utility
Training of machine learning sensor data classification system
4 Jan 21
This application discloses training of a classification system for an assisted or automated driving system of a vehicle.
Ljubo Mercep, Matthias Pollach
Filed: 15 Jan 18
Utility
Deterministic Test Pattern Generation for Designs with Timing Exceptions
30 Dec 20
Systems and methods for a deterministic automatic test generation (ATPG) process including Timing Exception ATPG (TEA).
Wu-Tung Cheng, Kun-Han Tsai, Naixing Wang, Chen Wang, Xijiang Lin, Mark A. Kassab, Irith Pomeranz
Filed: 21 Aug 19
Utility
Invariant property-based clustering of circuit images for electronic design automation (EDA) applications
21 Dec 20
A system may include an image clustering engine and a cluster provision engine.
Fedor G. Pikus, Muhammad Shahir Rahman
Filed: 24 Mar 20
Utility
Systems and Methods for Photolithographic Design
9 Dec 20
A method of identifying elements in a design layout having multiple levels of hierarchical cells, each cell having one or more geometric elements, may include selecting a cell from a list of candidate cells for a level of a hierarchy; applying a local rule to the selected cell; identifying each selected cell that includes a geometric element that passes the local rule; building a list of candidate cells for a next-higher level of the hierarchy according to the identified cells; repeating the selecting, identifying, and building operations for each higher level of the hierarchy; and when a highest level of the hierarchy has been processed, returning and storing the list of candidate cells as the global solution for the applied local rule.
Fedor G. Pikus
Filed: 25 Aug 20
Utility
Through silicon vias to interconnect electrical parasitic extraction
7 Dec 20
Disclosed herein are embodiments of tools and techniques for computing the electric coupling in terms of parasitic admittance and capacitance values between a through silicon via (TSV) and surrounding interconnect of an integrated circuit layout design.
Vasileios Kourkoulos, Georgios Manetas
Filed: 28 Sep 18
Utility
Limited basis quantum particle definitions in applications of quantum computing to electronic design automation processes
23 Nov 20
A system may include a quantum model engine configured to generate (e.g., load or instantiate) a quantum computing model to represent an electronic design automation (EDA) process for a circuit design.
Fedor G. Pikus, Shashank Jaiswal
Filed: 18 Nov 19
Utility
Signal probability-based test cube reordering and merging
9 Nov 20
A first score and a second score for each scan cell are first determined based on numbers of test cubes in a set of test cubes having a specified value of “1” and a specified value of “0” for the each scan cell, respectively.
Janusz Rajski, Yu Huang
Filed: 20 Mar 19
Utility
Low Pin Count Reversible Scan Architecture
28 Oct 20
A circuit comprises a plurality of scan chains configured to perform scan shifting in two opposite directions and a register configured to store a first signal.
Wu-Tung Cheng, Yu Huang
Filed: 22 Apr 20
Utility
Optimized Scan Chain Diagnostic Pattern Generation for Reversible Scan Architecture
21 Oct 20
A system and method for performing scan chain testing is disclosed.
Yu Huang, Szczepan Urban, Wu-Tung Cheng, Manish Sharma
Filed: 22 Aug 19
Utility
Identification of Key Errors In a System Having a Large Number of Error Events
14 Oct 20
A report of results of validating a circuit can simplify a large number of error events, that can be generated when designing electrical circuits using computer aided design tools, by first filtering the large number of error events according to a user defined filter criteria.
Michael Alam
Filed: 30 Mar 17
Utility
Scan Cell Architecture For Improving Test Coverage And Reducing Test Application Time
14 Oct 20
A scan cell comprises: a state element and selection and combination circuitry.
Nilanjan Mukherjee, Jedrzej Solecki, Janusz Rajski
Filed: 9 Apr 20
Utility
Sensor event detection and fusion
12 Oct 20
This application discloses a computing system to implement sensor event detection and fusion system in an assisted or automated driving system of a vehicle.
Ljubo Mercep, Matthias Pollach
Filed: 29 Jan 17
Utility
Non-adaptive pattern reordering to improve scan chain diagnostic resolution in circuit design and manufacture
5 Oct 20
Systems and methods for re-ordering test patterns for circuit design or testing.
Yu Huang, Jakub Janicki, Szczepan Urban
Filed: 21 May 19
Utility
Interface connectivity for printed circuit board schematic
5 Oct 20
This application discloses a computing system implementing a schematic capture tool to place and connect parts in a schematic design of a printed circuit board assembly.
Michał Paszek, Tomasz Zielski, Michał Ferdek, Pawel Cieslak, Marek Mossakowski
Filed: 27 Sep 18