135 patents
Page 2 of 7
Utility
Optimized scan chain diagnostic pattern generation for reversible scan architecture
22 Jun 21
A system and method for performing scan chain testing is disclosed.
Yu Huang, Szczepan Urban, Wu-Tung Cheng, Manish Sharma
Filed: 23 Aug 19
Utility
Diagnosis resolution prediction
22 Jun 21
This application discloses a computing system implementing an automatic test pattern generation tool to generate test patterns to apply to scan chains in an integrated circuit.
Huaxing Tang, Jakub Janicki
Filed: 31 Aug 20
Utility
Parallel fault simulator with back propagation enhancement
15 Jun 21
This application discloses a computing system implementing a functional safety validation tool to simulate an integrated circuit design with a stimulus vector.
Sanjay Pillay, Arun Kumar Gogineni, Srikanth Rengarajan
Filed: 3 Dec 18
Utility
Reconfiguring monitoring circuitry
1 Jun 21
A method of reconfiguring a current debug configuration of a debug unit connected to a peripheral circuit on an integrated circuit chip.
Andrew Brian Thomas Hopkins, Andrew James Bower, Michael Jonathan Thyer
Filed: 30 Jul 19
Utility
Puzzle-based pattern analysis and classification
1 Jun 21
Methods and apparatus for pattern matching and classification are disclosed.
Jia-Tze Huang, Jonathan James Muirhead
Filed: 11 Dec 18
Utility
System for processing messages of data stream
1 Jun 21
A system for processing messages of a high rate data stream and an apparatus including: a message processor including a plurality of processor sub-modules and configured to read an input data stream, process the input data stream, and to output an output data stream; at least one payload memory storing data related to the input data stream and accessible to the message processor; at least one instruction memory accessible to the message processor and storing computer program instructions configuring the message processor to process the input data stream; and an application processor configured to rewrite the at least one instruction memory.
Kari Vierimaa
Filed: 9 Jan 20
Utility
Optical proximity correction modeling with density-based gauge weighting
1 Jun 21
This application discloses a computing system implementing an optical proximity correction model calibration tool to determine parameters for gauges describing features of an integrated circuit.
Germain Louis Fenger, Andrew Burbine, Christopher Clifford
Filed: 19 Aug 20
Utility
Concolic equivalence checking
25 May 21
This application discloses a computing system to select a set of one or more values for control signals internal to multiple circuit designs, generate input stimulus for the circuit designs based, at least in part, on the selected set of values for the control signals, and simulate the circuit designs with the input stimulus, which configures the simulated values of the control signals internal to the circuits designs to the selected set of values.
Pritam Roy, Sagar Chaki, Pankaj Chauhan
Filed: 24 Mar 20
Utility
Form board merge
25 May 21
This application discloses a computing system to merge a first form board design describing a configuration for use in manufacturing a first wire harness with a second form board design describing a configuration for use in manufacturing a second wire harness.
Alexander Sumner, Frank Hemmersbach, Mohamed El-Morsy, Adam Bedford, Vikas Maddukuri
Filed: 8 Jul 19
Utility
Edge-based camera for characterizing semiconductor layout designs
25 May 21
System and methods for an edge-based camera are disclosed.
Hazem Hegazy, Ahmed Hamed Fathi Hamed, Omar Elsewefy
Filed: 30 Aug 19
Utility
Prediction of test pattern counts for scan configuration determination
18 May 21
One, two, or three test pattern generation and encoding processes are performed for a circuit design to generate compressed test patterns for one or two input channel numbers.
Yu Huang, Janusz Rajski, Mark A. Kassab, Wu-Tung Cheng
Filed: 13 Apr 20
Utility
System and method for layout analysis using point of interest patterns and properties
11 May 21
Systems and methods for layout analysis using unit cell properties.
Sherif Hany Riad Mohammed Mousa, Jea Woo Park, Michael White
Filed: 3 Aug 20
Utility
Subtractive design for heat sink improvement
11 May 21
Aspects of the disclosed technology relate to techniques of improving heat sink designs based on systematic mass removal.
Robin Bornoff, John Richard Wilson, John Parry
Filed: 27 Sep 16
Utility
Environmental perception in autonomous driving using captured audio
4 May 21
This application discloses sensors to capture audio measurement in an environment around a vehicle and a computing system to classify audio measurements captured with one or more sensors mounted to a vehicle, wherein the classified audio measurements identify to a type of object in an environment around the vehicle, and fuse the classified audio measurements with measurements captured by at least one different type of sensor to detect the object in the environment around the vehicle, wherein a control system for the vehicle is configured to control operation of the vehicle based, at least in part, on the detected object.
Amin Kashi, Glenn Perry, Ohad Barak, Nizar Sallem
Filed: 31 Dec 18
Utility
Test generation using testability-based guidance
4 May 21
Constant-output-value gates and buffer gates are determined for gates in a circuit design based on a hold-toggle pattern.
Sylwester Milewski, Janusz Rajski, Yu Huang
Filed: 21 Mar 19
Utility
Performance profiling for a multithreaded processor
13 Apr 21
An apparatus comprising: a processing unit configured to execute a plurality of threads; a profiling unit configured to: profile the operation of the processing unit over a time period to generate an activity profile indicating when each of the plurality of threads is executed by the processing unit over the time period; analyse the generated activity profile to determine whether a signature of the processing unit's thread execution for the time period matches a signature indicating a baseline of thread execution for the processing unit; output an alert signal if the signature of the processing unit's thread execution for the time period does not match the signature indicating a baseline of thread execution for the processing unit.
Gajinder Singh Panesar
Filed: 10 Apr 19
Utility
Deterministic test pattern generation for designs with timing exceptions
13 Apr 21
Systems and methods for a deterministic automatic test generation (ATPG) process including Timing Exception ATPG (TEA).
Wu-Tung Cheng, Kun-Han Tsai, Naixing Wang, Chen Wang, Xijiang Lin, Mark A. Kassab, Irith Pomeranz
Filed: 22 Aug 19
Utility
Scan cell architecture for improving test coverage and reducing test application time
30 Mar 21
A scan cell comprises: a state element and selection and combination circuitry.
Nilanjan Mukherjee, Jedrzej Solecki, Janusz Rajski
Filed: 10 Apr 20
Utility
Test scheduling and test access in test compression environment
23 Mar 21
Disclosed are representative embodiments of methods, apparatus, and systems for test scheduling and test access in a test compression environment.
Mark Kassab, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jakub Janicki, Jerzy Tyszer
Filed: 16 Mar 11
Utility
Voltage and temperature adaptive memory leakage reduction bias circuit
2 Mar 21
This application discloses a memory device to retain stored data when receiving a voltage supply having at least a retention voltage level.
Kwan Him Lam
Filed: 28 Aug 19