28912 patents
Page 50 of 1446
Utility
Static Random Access Memory with Pre-charge Circuit
30 Nov 23
The present disclosure describes embodiments of a memory device with a pre-charge circuit.
Po-Sheng WANG, Yangsyu Lin, Cheng Hung Lee
Filed: 9 Aug 23
Utility
Semiconductor Structure and Method for Forming the Same
30 Nov 23
A method for forming a semiconductor structure is provided.
Chun-Hung CHEN, Jhon-Jhy LIAW
Filed: 27 May 22
Utility
zgt1ti9lpvj2yek0a2r4vezq69zbo
30 Nov 23
A memory device includes a first memory cell including a first transistor and a first anti-fuse structure electrically coupled to each other in series.
Hsiang-Wei Liu
Filed: 24 May 22
Utility
s1y2zszl43phrwpqptpvx1kwbgucvnhwk3317joyjom2glglnje8ypp4x181
30 Nov 23
An integrated circuits (IC) includes a standard cell array and a SRAM cell array.
Jhon-Jhy LIAW
Filed: 28 Jul 23
Utility
xgcau6n5iyk12q47qm5m8nbh2iq mhy
30 Nov 23
A semiconductor die comprises: a first semiconductor device and a second semiconductor device.
Meng-Han Lin, Chia-En Huang
Filed: 28 Jul 23
Utility
od35 ak77mbrr9nhak0oakb1qh7
30 Nov 23
A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer.
Chih-Yu Hsu, Jian-Hao Chen, Chia-Wei Chen, Shan-Mei Liao, Hui-Chi Chen, Yu-Chia Liang, Shih-Hao Lin, Kuei-Lun Lin, Kuo-Feng Yu, Feng-Cheng Yang, Yen-Ming Chen
Filed: 9 Aug 23
Utility
fxibgzz0aieejiommwn uyhwubujfgx7nnryc5vruqe
30 Nov 23
The present disclosure describes a patterning process for a strap region in a memory cell for the removal of material between polysilicon lines.
Yen-Jou WU, Hsin-Hui Lin, Yu-Liang Wang, Chih-Ming Lee, Keng-Ying Liao, Ping-Pang Hsieh, Su-Yu Yeh
Filed: 10 Aug 23
Utility
svjg36uemgd3gn53b7i n3vbixn3wz6v45c3nxd15cdys5rfb
30 Nov 23
Semiconductor devices are provided.
Jhon-Jhy LIAW
Filed: 31 May 22
Utility
6uk8amhkimc83lt11xb2gwu259je1wu
30 Nov 23
A memory device includes a plurality of first memory cells disposed along a vertical direction.
Meng-Han Lin, Chia-En Huang
Filed: 28 Jul 23
Utility
fl5xkl4jpoa9rzgm2znj4eaghfnylnyyavgx1ju cebzq8rhf
30 Nov 23
A method includes: forming an interconnect structure over a substrate, the forming of the interconnect structure includes forming a memory device including a transistor.
MENG-HAN LIN, CHIA-EN HUANG, YA-YUN CHENG, PENG-CHUN LIOU
Filed: 31 May 22
Utility
o1x1lmc0uhw860mvmfcalx6ue5x6fa8ybkv2etljfhvkl79qjzo1l9tu
30 Nov 23
A semiconductor device includes a first conductor structure extending along a lateral direction.
Meng-Han Lin, Chia-En Huang
Filed: 9 Aug 23
Utility
m5d 5v2tut1d62cylldpf
30 Nov 23
A memory device includes a first programming gate-strip for a first anti-fuse structure and a second programming gate-strip for a second anti-fuse structure.
Meng-Sheng CHANG, Chia-En HUANG, Yao-Jen YANG, Yih WANG
Filed: 10 Aug 23
Utility
zy9sm0gvjzwiist0ki58ps
30 Nov 23
A semiconductor includes a ferroelectric layer, a first semiconductor layer, a first gate, a second semiconductor layer, a second gate and contact structures.
Gerben Doornbos, Mauricio MANFRINI
Filed: 26 Jul 23
Utility
83mr9mb3scny46pxdyajr07i6selu8lro4g
30 Nov 23
The present disclosure provides a semiconductor structure and a method for forming a semiconductor structure.
Feng-Ching Chu, Feng-Cheng Yang, Katherine H. Chiang, Chung-Te Lin, Chieh-Fang Chen
Filed: 9 Aug 23
Utility
rbf3ccv x1hbhkoje6x1obsx9bhr0f
30 Nov 23
A method of forming a semiconductor memory device includes: forming a stack structure on a substrate, the stack structure including a plurality of dielectric layers and a plurality of sacrificial layers alternatingly stacked in a Z direction substantially perpendicular to the substrate; forming a plurality of source/drain trenches in the stack structure; conformally forming a barrier layer in the source/drain trenches, and then filling the source/drain trenches with a plurality of sacrificial segments; forming a protection layer over the stack structure to cover the barrier layer and the sacrificial segments; removing the sacrificial layers of the stack structure to form a plurality of spaces among the dielectric layers; forming a plurality of conductive layers in the spaces; sequentially removing the protection layer, the sacrificial segments and the barrier layer; and forming a plurality of memory structures in the source/drain trenches.
Wei-Chih WEN, Yu-Wei JIANG, Han-Jong CHIA
Filed: 26 May 22
Utility
e3d nj3q0p3urouj733zee8856a7cpykc9sbh7ffaq
30 Nov 23
A method of forming a memory device according to the present disclosure includes forming a trench in a first substrate of a first wafer, depositing a data-storage element in the trench, performing a thermal treatment to the first wafer to improve a crystallization in the data-storage element, forming a first redistribution layer over the first substrate, forming a transistor in a second substrate of a second wafer, forming a second redistribution layer over the second substrate, and bonding the first wafer with the second wafer after the performing of the thermal treatment.
Yi-Hsuan Chen, Kuen-Yi Chen, Yi Ching Ong, Yu-Wei Ting, Kuo-Chi Tu, Kuo-Ching Huang, Harry-Hak-Lay Chuang
Filed: 9 Mar 23
Utility
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30 Nov 23
A memory device includes a substrate, a spin-orbit torque (SOT) layer, a magnetic tunneling junction (MTJ) film stack, a connecting via and a shielding structure.
Yen-Lin Huang, Ming-Yuan Song, Chien-Min Lee, Nuo Xu, Shy-Jay Lin
Filed: 30 May 22
Utility
aiw5bd9ipv2unby4n4h59l4kg1vkqrzqyt7u04 0r3ozx
30 Nov 23
3D memory array devices and methods of manufacturing are described herein.
Chia-Yu Ling, Katherine H. Chiang, Chung-Te Lin
Filed: 8 Aug 23
Utility
bh01 qnx1c2vn8cyfu969c1mu5y
30 Nov 23
A magnetic memory device includes a substrate, a spin-orbit torque (SOT) induction structure, and a magnetic tunnel junction (MTJ) stack.
Ming-Yuan Song, Chien-Min Lee, Shy-Jay Lin, Tung-Ying Lee, Xinyu BAO
Filed: 1 Sep 22
Utility
8cgkxemaa0lj921suc0sst6hh72fdjynannb9lutihf84
30 Nov 23
A device includes a semiconductor substrate; a first word line over the semiconductor substrate, the first word line providing a first gate electrode for a first transistor; and a second word line over the first word line.
Yu-Ming Lin, Bo-Feng Young, Sai-Hooi Yeong, Han-Jong Chia, Chi On Chui
Filed: 3 Aug 23