28912 patents
Page 49 of 1446
Utility
3D capacitor and method of manufacturing same
5 Dec 23
A device includes a substrate including a low-resistance top surface and a fin structure including a first fin and a second fin.
Chi-Wen Liu, Chao-Hsiung Wang
Filed: 22 Jul 21
Utility
Method for selective removal of gate dielectric from dummy fin
5 Dec 23
A method includes forming an active channel region, forming a dummy channel region, forming a first gate dielectric layer over the active channel region, forming a second gate dielectric layer over the dummy channel region, removing the second gate dielectric layer from the dummy channel region, forming a gate isolation region over and contacting the dummy channel region, and forming a first gate stack and a second gate stack.
Shih-Yao Lin, Chih-Han Lin
Filed: 27 Jul 20
Utility
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5 Dec 23
A semiconductor device and method of manufacture which utilize isolation structures between semiconductor regions is provided.
Pei Yu Lu, Je-Ming Kuo
Filed: 29 Jul 20
Utility
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5 Dec 23
An integrated circuit includes a drift region in a substrate, a drain in the substrate which includes a doped drain well, the doped drain well including a first zone, having a first concentration of a first dopant, and a second zone, having a second concentration of the first dopant, where the first concentration is smaller than the second concentration, and a gate electrode over the drift region and being separated from the doped drain well in a direction parallel to a top surface of the substrate by a distance greater than 0.
Zheng Long Chen
Filed: 2 Feb 21
Utility
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5 Dec 23
A semiconductor device and method of manufacture are provided which utilizes metallic seeds to help crystallize a ferroelectric layer.
Bo-Feng Young, Sai-Hooi Yeong, Chi On Chui
Filed: 17 Feb 22
Utility
tpre102s0c86ioohvx2ekef083gm5ig35x7lz4
5 Dec 23
Various embodiments of the present disclosure are directed towards a method for forming an integrated chip.
Han-Jong Chia
Filed: 21 Jun 22
Utility
nj6v1zvjo9ldqgx99u5ufobp7muqpy9u
5 Dec 23
A semiconductor device and a method of forming the same are provided.
Xusheng Wu, Chang-Miao Liu, Huiling Shang
Filed: 15 Dec 20
Utility
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5 Dec 23
A semiconductor device structure is provided.
Kuo-Chiang Tsai, Fu-Hsiang Su, Ke-Jing Yu, Chih-Hong Hwang, Jyh-Huei Chen
Filed: 2 Aug 21
Utility
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5 Dec 23
An integrated circuit includes a clocking transistor, a first enabling transistor, a second enabling transistor, a branch-one transistor, a branch-two transistor, and a clock gating circuit.
Huaixin Xian, Liu Han, Jing Ding, Qingchao Meng
Filed: 29 Jun 21
Utility
v6qi10gnhp8ov536c3orje1o928uqh
5 Dec 23
A fluid collecting apparatus includes a housing, a gripping member, an inlet, and an outlet.
Kuo Yang Wu, Shih-Ming Wang
Filed: 26 Mar 21
Utility
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5 Dec 23
A process of forming a three-dimensional (3D) memory array includes forming a stack having a plurality of conductive layers of carbon-based material separated by dielectric layers.
Chun-Chieh Lu, Sai-Hooi Yeong, Yu-Ming Lin
Filed: 7 Dec 20
Utility
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5 Dec 23
Various embodiments of the present application are directed towards an integrated chip comprising memory cells separated by a void-free dielectric structure.
Hsia-Wei Chen, Wen-Ting Chu, Yu-Wen Liao
Filed: 9 Jun 21
Utility
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5 Dec 23
The present disclosure provides a semiconductor structure including a first electrode via, a first electrode on the first electrode via, a magnetic tunneling junction (MTJ) over the first electrode, a second electrode over the MTJ, a first dielectric layer on the first electrode via, a second dielectric layer on the first dielectric layer.
Chern-Yow Hsu, Shih-Chang Liu
Filed: 25 Feb 21
Utility
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5 Dec 23
A device includes a control circuit, a scope circuit, a first logic gate and a second logic gate.
Chung-Peng Hsieh, Chih-Chiang Chang, Chung-Chieh Yang
Filed: 21 Dec 22
Utility
i0vk0dfjpfya7m5upl1tcqlqzgki32jd3d42
5 Dec 23
The present disclosure provides a calibration system for wavelength-division multiplexing (WDM), a WDM system, and a calibrating method for WDM.
Tai-Chun Huang, Lan-Chou Cho, Chewn-Pu Jou, Stefan Rusu
Filed: 17 Jun 22
Utility
owm1zeuc6osss96rg3ib24egarhhaq92nql4vwwhuje1ircpc
5 Dec 23
A resist material dispensing system includes a resist supply and a resist filter connected to the resist supply downstream from the resist supply.
Chen Yi Hsu, Shang-Sheng Li, Yung-Yao Lee
Filed: 21 Nov 19
Utility
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5 Dec 23
An overlay mark includes a first, a second, a third, and a fourth component.
Yu-Ching Lee, Te-Chih Huang, Yu-Piao Fang
Filed: 29 Jul 22
Utility
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5 Dec 23
A method includes: providing a workpiece to a semiconductor apparatus, the workpiece including a material layer, wherein the material layer includes a first strip having a first plurality of exposure fields configured to be exposed in a first direction and a second plurality of exposure fields configured to be exposed in a second direction different from the first direction; scanning the first strip along a first scan route in the first direction to generate first topography measurement data; scanning the first strip along a second scan route in the second direction to generate second topography measurement data; and exposing the first plurality of exposure fields according to the first topography measurement data and exposing the second plurality of exposure fields according to the second topography measurement data.
Yung-Yao Lee, Yeh-Chin Wang, Yang-Ann Chu, Yung-Hsiang Chen, Yung-Cheng Chen
Filed: 31 Oct 22
Utility
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30 Nov 23
A semiconductor device includes a first semiconductor fin extending along a first direction.
Shih-Yao Lin, Hsiao Wen Lee, Chih-Han Lin
Filed: 8 Aug 23
Utility
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30 Nov 23
An extreme ultra violet (EUV) radiation source apparatus includes a collector, a target droplet generator for generating a tin (Sn) droplet, a rotatable debris collection device and a chamber enclosing at least the collector and the rotatable debris collection device.
Shang-Chieh CHIEN, Po-Chung CHENG, Chia-Chen CHEN, Jen-Yang CHUNG, Li-Jui CHEN, Tzung-Chi FU, Shang-Ying WU
Filed: 7 Aug 23