28912 patents
Page 48 of 1446
Utility
Conductive rail structure for semiconductor devices
5 Dec 23
The present disclosure describes a semiconductor structure and a method for forming the same.
Yi-Bo Liao, Wei Ju Lee, Cheng-Ting Chung, Hou-Yu Chen, Chun-Fu Cheng, Kuan-Lun Cheng
Filed: 18 Apr 22
Utility
Electrical fuse bit cell in integrated circuit having backside conducting lines
5 Dec 23
An integrated circuit includes a front-side horizontal conducting line in a first metal layer, a front-side vertical conducting line in a second metal layer, a front-side fuse element, and a backside conducting line.
Chien-Ying Chen, Yen-Jen Chen, Yao-Jen Yang, Meng-Sheng Chang, Chia-En Huang
Filed: 26 Aug 21
Utility
Liner-free conductive structures with anchor points
5 Dec 23
The present disclosure describes a method for forming liner-free or barrier-free conductive structures.
Hsu-Kai Chang, Keng-Chu Lin, Sung-Li Wang, Shuen-Shin Liang, Chia-Hung Chu
Filed: 28 Jul 22
Utility
Self-aligned cavity strucutre
5 Dec 23
The present disclosure relates to an integrated chip comprising a pair of first metal lines over a substrate.
Wei-Hao Liao, Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Yu-Teng Dai
Filed: 6 Apr 22
Utility
Method of forming semiconductor packages having through package vias
5 Dec 23
A semiconductor device and method for forming the semiconductor device is provided.
Chen-Hua Yu, Chung-Shi Liu, Chih-Wei Lin, Ming-Da Cheng
Filed: 29 Mar 21
Utility
Conductive bump of a semiconductor device and fabricating method thereof
5 Dec 23
Present disclosure provides a semiconductor structure and a method for fabricating a semiconductor structure.
Chang-Pin Huang, Tung-Liang Shao, Hsien-Ming Tu, Ching-Jung Yang, Yu-Chia Lai
Filed: 7 Apr 21
Utility
Semiconductor package and method of forming thereof
5 Dec 23
A semiconductor device includes a redistribution structure, an integrated circuit package attached to a first side of the redistribution structure and a core substrate coupled to a second side of the redistribution structure with a first conductive connector and a second conductive connector.
Jiun Yi Wu, Chen-Hua Yu
Filed: 26 Feb 21
Utility
Bonding passive devices on active device dies to form 3D packages
5 Dec 23
A package includes a package substrate, an interposer over and bonded to the package substrate, a first wafer over and bonding to the interposer, and a second wafer over and bonding to the first wafer.
Chen-Hua Yu, Kuo Lung Pan, Shu-Rong Chun, Chi-Hui Lai, Tin-Hao Kuo, Hao-Yi Tsai, Chung-Shi Liu
Filed: 2 Mar 20
Utility
Package structure
5 Dec 23
A package structure includes at least one semiconductor die, an insulating encapsulant, an isolation layer and a redistribution layer.
Hsien-Wei Chen, Ming-Fa Chen, Sung-Feng Yeh
Filed: 18 Feb 22
Utility
Semiconductor structure
5 Dec 23
A semiconductor structure includes: a first die, comprising a first interconnect structure and a first active pad electrically connected to the first interconnect structure; a first bonding dielectric layer over the first die; a first active bonding via in the first bonding dielectric layer, electrically connected to the first interconnect structure; and a plurality of first dummy bonding vias in the first bonding dielectric layer, wherein the first dummy bonding vias laterally surround the first active bonding via and are electrically floating.
Hsien-Wei Chen, Jie Chen, Ming-Fa Chen, Ching-Jung Yang
Filed: 2 May 21
Utility
Package structure and method of forming thereof
5 Dec 23
A package structure includes a package substrate, a first die, a second die, a first underfill, and a second underfill.
Jen-Yuan Chang, Sheng-Chih Wang
Filed: 17 Jun 21
Utility
Package structure and manufacturing method thereof
5 Dec 23
A package structure and the manufacturing method thereof are provided.
Wei-Yu Chen, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Li-Hsien Huang, Po-Hao Tsai, Ming-Shih Yeh, Ta-Wei Liu
Filed: 3 Jan 22
Utility
Semiconductor device structure and method for manufacturing the same
5 Dec 23
A semiconductor device structure includes a first chip, second chip, a first metal structure, a second metal structure, a first via structure and a second via structure.
Cheng-Ying Ho, Wen-De Wang, Jen-Cheng Liu, Dun-Nian Yaung
Filed: 27 Dec 19
Utility
Semiconductor device electrostatic discharge diode
5 Dec 23
A semiconductor device includes a first doped zone and a second doped zone in a first semiconductor material, the first doped zone being separated from the second doped zone; an isolation structure between the first doped zone and the second doped zone; and a first line segment over a top surface of the first doped zone, where the ends of the first line segment and the ends of the second line are over the isolation structure.
Li-Wei Chu, Wun-Jie Lin, Yu-Ti Su, Ming-Fu Tsai, Jam-Wem Lee
Filed: 27 Aug 21
Utility
Semiconductor device structure having a plurality of threshold voltages and method of forming the same
5 Dec 23
An embodiment method includes forming a semiconductor liner layer on a first fin structure and on a second fin structure and forming a first capping layer on the semiconductor liner layer disposed on the first fin structure.
Yu-San Chien, Hsin-Che Chiang, Chun-Sheng Liang, Kuo-Hua Pan
Filed: 24 May 21
Utility
Extended side contacts for transistors and methods forming same
5 Dec 23
A method includes forming a source/drain region for a transistor, forming a first inter-layer dielectric over the source/drain region, and forming a lower source/drain contact plug over and electrically coupling to the source/drain region.
Ying-Yu Lai, Chih-Hsuan Lin, Hsi Chung Chen, Chih-Teng Liao
Filed: 27 May 21
Utility
Data storage element and manufacturing method thereof
5 Dec 23
Disclosed herein, in some embodiments, is a memory device.
Hung-Li Chiang, Chao-Ching Cheng, Jung-Piao Chiu, Tzu-Chiang Chen, Yu-Sheng Chen
Filed: 24 Aug 20
Utility
Image sensor comprising polysilicon gate electrode and nitride hard mask
5 Dec 23
An image sensor includes a semiconductor substrate, a gate dielectric layer, a gate electrode, a protection oxide film, and a nitride hard mask.
Chun-Wei Chia, Chun-Hao Chou, Kai-Chun Hsu, Kuo-Cheng Lee, Shyh-Fann Ting
Filed: 29 Jul 22
Utility
Source/drain spacer with air gap in semiconductor devices and methods of fabricating the same
5 Dec 23
A semiconductor structure includes a semiconductor fin protruding from a substrate, a dielectric fin disposed adjacent and substantially parallel to the semiconductor fin, an epitaxial source/drain (S/D) feature disposed in the semiconductor fin, a dielectric layer disposed between a sidewall of the epitaxial S/D feature and a sidewall of the dielectric fin, and an air gap disposed in the dielectric layer.
Ko-Cheng Liu, Ming-Lung Cheng, Chang-Miao Liu
Filed: 9 Apr 21
Utility
Method for manufacturing memory device
5 Dec 23
A semiconductor device includes a substrate, a gate structure disposed over the substrate, a drain structure disposed in the substrate, and a source structure disposed in the substrate on an n opposite side of the gate structure from the drain structure.
Chien Hung Liu
Filed: 14 Mar 21