28912 patents
Page 61 of 1446
Utility
Sub-resolution Assist Features
30 Nov 23
Methods of semiconductor device fabrication are provided.
Kenji Yamazoe, Junjiang Lei, Danping Peng
Filed: 10 Aug 23
Utility
Photoresist Composition and Method for Manufacturing a Semiconductor Device
30 Nov 23
A method for manufacturing a semiconductor device includes forming a resist layer including a resist composition over a substrate.
An-Ren ZI, Ching-Yu CHANG
Filed: 9 Aug 23
Utility
05emcet76oz sqqhdfjd1wpxy
30 Nov 23
Photoresist materials described herein may include various types of tin (Sn) clusters having one or more types of ligands.
Ming-Hui WENG, Yahru CHENG, Ching-Yu CHANG
Filed: 10 Aug 23
Utility
o7k9w4t8aonoabbd13b1uc4cuo
30 Nov 23
A method of forming a photoresist pattern includes forming a photoresist layer including a photoresist composition over a substrate.
An-Ren Zi, Ching-Yu Chang
Filed: 9 Aug 23
Utility
6q1kzw5mi1g8 sya13g4wn3gga
30 Nov 23
A method of manufacturing a semiconductor device includes applying a polymer mixture over a substrate, exposing and developing at least a portion of the polymer mixture to form a developed dielectric, and curing the developed dielectric to form a dielectric layer.
Sih-Hao Liao, Yu-Hsiang Hu, Hung-Jui Kuo, Chen-Hua Yu
Filed: 9 Aug 23
Utility
kcvyowxxcvv8xnuoba3h4hm io6
30 Nov 23
Yen-Hao CHEN, Wei-Han LAI, Ching-Yu CHANG
Filed: 9 Aug 23
Utility
hkljbzstlpfhamjk5a g1g9y
30 Nov 23
A polymer composition comprises a polymer having a main chain and pendant photobase generator (PBG) groups, pendant thermal base generator (TBG) groups, or a combination of pendant PBG and pendant TBG groups.
Ming-Hui WENG, Chen-Yu LIU, Ching-Yu CHANG
Filed: 10 Aug 23
Utility
80i7nr9pj1rvaqcoucxrt3nvzqyypzpczazi7609 1myxhcq29wpsv
30 Nov 23
A method of manufacturing a semiconductor device includes forming a photoresist under-layer including a photoresist under-layer composition over a semiconductor substrate, and forming a photoresist layer including a photoresist composition over the photoresist under-layer.
An-Ren ZI, Chin-Hsiang Lin, Ching-Yu Chang
Filed: 10 Aug 23
Utility
kwvbkqdtderdl5hj2c6fsd6ol43k9o
30 Nov 23
A method of supplying a chemical solution to a photolithography system.
Wen-Zhan Zhou, Heng-Jen Lee, Hsu-Yuan Liu, Yu-Chen Huang, Cheng-Han Wu, Shih-Che Wang, Ho-Yung David Hwang
Filed: 4 Aug 23
Utility
wh0tlirvjqwj1xi2j8ibb3cm
30 Nov 23
An apparatus and a method for effectively exhausting evaporated material are provided.
Po-Han Wang, Yu-Hsiang Hu, Hung-Jui Kuo, Chen-Hua Yu
Filed: 9 Aug 23
Utility
cndlkw2maww94kjq3e0xaxzn0299k9no
30 Nov 23
Methods and materials for making a semiconductor device are described.
An-Ren Zi, Ching-Yu Chang
Filed: 10 Aug 23
Utility
jx7lbe7cu7e52f9lm 5lo
30 Nov 23
Some implementations described herein provide an exposure tool and associated methods of operation in which a scanner control system generates a scanner route for an exposure recipe such that the distance traveled by a substrate stage of the exposure tool along the scanner route is reduced and/or optimized for non-exposure fields on a semiconductor substrate.
Kai-Chieh CHANG, Kai-Fa HO, Li-Jui CHEN, Heng-Hsin LIU
Filed: 9 Aug 23
Utility
g8cfjxedvcxo1hgma3ay
30 Nov 23
A method of manufacturing a photo mask includes determining an enhancement region, in a simulation zone, of a layout pattern of a photo mask.
Sagar TRIVEDI, Daniel Beylkin
Filed: 7 Aug 23
Utility
ps3f3zh5z76qfqso83088qskh5wlq3vgcpl
30 Nov 23
A method includes receiving a layout for fabricating a mask, determining a plurality of target contours corresponding to a plurality of sets of lithographic process conditions, determining a modification to the layout, simulating the modification to the layout under the plurality of sets of lithographic process conditions to produce a plurality of simulated contours, determining a cost of the modification to the layout based on comparisons between the plurality of simulated contours and corresponding ones in the plurality of target contours, and providing the modification to the layout for fabricating the mask based at least in part on the cost being within a predetermined threshold.
Dong-Yo Jheng, Ken-Hsien Hsieh, Shih-Ming Chang, Chih-Jie Lee, Shuo-Yen Chou, Ru-Gun Liu
Filed: 30 Jul 23
Utility
9es2uzjd0qam49nlbhmmx86i0v8p dku9wk
30 Nov 23
A method of treating a surface of a reticle includes retrieving a reticle from a reticle library and transferring the reticle to a treatment device.
Yih-Chen SU, Tzu-Yi WANG, Ta-Cheng LIEN
Filed: 10 Aug 23
Utility
5lny2rp7udflliffgv8e5zk6jmkmrpdsz5s6d97nkhglraut6epctla
30 Nov 23
A method of extreme ultraviolet lithography includes: generating within a source vessel extreme ultraviolet (EUV) light by striking a stream of droplets of target material shot across the source vessel with pulses from a laser to create a plasma from which EUV light is emitted; directing the generated EUV light out of the source vessel through an intermediate focus cap along a pathway toward a reticle of a scanner; creating a longitudinal mechanical wave extending across the pathway; and exposing a photoresist layer on a semiconductor substrate to pattern a circuit layout by the generated EUV light.
Tai-Yu Chen, Sheng-Kang YU, Kia Tak Lam, Sagar Deepak Khivsara, Shang-Chieh Chien
Filed: 9 Aug 23
Utility
ee8enx pbh02z8qkhdbdjb4k6j
30 Nov 23
An extreme ultraviolet (EUV) source includes a module vessel and a scrubber system.
Chun-Kai CHANG, Yu Sheng CHIANG, Yu De LIOU, Chi YANG, Ching-Juinn HUANG, Po-Chung CHENG
Filed: 10 Aug 23
Utility
8cq57xgk5bodh7rxzkcvc4fo7si4asp2jb7 pyngn
30 Nov 23
A cooling controller receives, from one or more sensors, wafer information associated with a wafer.
Yung-Yao LEE, Cheng-Kang HU, Jui-Chun PENG, Hsu-Shui LIU
Filed: 31 Jul 23
Utility
008styb6n5fuyaax0oa0apob57js6vfw0v0qbxdbgjrvd
30 Nov 23
A semiconductor device is disclosed.
Chun-Hsien Huang, Hong-Mao Lee, Hsien-Lung Yang, Yu-Kai Chen, Wei-Jung Lin
Filed: 27 Jul 23
Utility
9q2r6q2o0vgjyloxtj75pidc21nu1dx37dn1l 2kscima5lrmhy9745n
30 Nov 23
In an embodiment, a structure includes a core substrate, a redistribution structure coupled to a first side of the core substrate, the redistribution structure including a plurality of redistribution layers, each of the plurality of redistribution layers comprising a dielectric layer and a metallization layer, and a first local interconnect component embedded in a first redistribution layer of the plurality of redistribution layers, the first local interconnect component including a substrate, an interconnect structure on the substrate, and bond pads on the interconnect structure, the bond pads of the first local interconnect component physically contacting a metallization layer of a second redistribution layer, the second redistribution layer being adjacent the first redistribution layer, the metallization layer of the second redistribution layer comprising first conductive vias, the dielectric layer of the first redistribution layer encapsulating the first local interconnect component.
Jiun Yi Wu, Chen-Hua Yu
Filed: 9 Aug 23