1577 patents
Page 28 of 79
Utility
Semiconductor device and method for controlling semiconductor device
28 Dec 21
To provide a semiconductor device having a thin-film BOX-SOI structure and capable of realizing a high-speed operation of a logic circuit and a stable operation of a memory circuit.
Ryuta Tsuchiya, Toshiaki Iwamatsu
Filed: 30 Aug 16
Utility
Semiconductor device for image distortion correction processing and image reduction processing
28 Dec 21
A semiconductor device includes a distortion correction unit that performs correct distortion processing on a captured image, a SRAM that stores image data after the distortion correction processing, a filter processing unit that receives the image data after the distortion correction processing from the SRAM and that performs smoothing filter processing on the image data after the distortion correction processing, after the image data after the distortion correction processing having a size required for the smoothing filter processing is stored in the SRAM, and an image reduction unit that performs reduction processing on image data after the smoothing filter processing.
Akihiro Yamamoto
Filed: 19 Apr 21
Utility
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28 Dec 21
A semiconductor device for an apparatus having a movement drive unit and an image unit, includes an image detection unit, an image recognition unit and control unit.
Remi Miyamoto, Keisuke Matsumoto
Filed: 14 Apr 20
Utility
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23 Dec 21
A semiconductor device has a silicon film for a diode formed on a semiconductor substrate via an insulating film, and first and second wirings formed on an upper layer of the silicon film.
Hiroyoshi KUDOU, Taro MORIYA, Satoshi UCHIYA
Filed: 7 May 21
Utility
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21 Dec 21
A semiconductor device capable of suppressing performance degradation and systems using the same are provided.
Yasuo Sasaki
Filed: 18 Sep 19
Utility
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21 Dec 21
A method for manufacturing a semiconductor device includes a step of reducing a thickness of a silicon oxide film embedded in an element isolation trench including fins in order to form protruded fins.
Tomohiro Hayashi
Filed: 27 Sep 19
Utility
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16 Dec 21
A semiconductor device is configured so that two or more master devices access a slave device via a bus.
Koki HIGUCHI, Tsutomu MATSUZAKI, Masafumi INOUE, Masakatsu UNEME
Filed: 12 May 21
Utility
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16 Dec 21
A calculation accuracy of a communication quality for use in selecting a communication path is improved.
Hiroaki TSUDA
Filed: 22 Apr 21
Utility
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14 Dec 21
A radar device is provided which is capable of highly accurate distance calculation by a simple method.
Yuji Motoda
Filed: 16 Apr 19
Utility
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14 Dec 21
A semiconductor device including a digital circuit, a first ground potential line provided corresponding to the digital circuit, an analog circuit, a second ground potential line respectively provided corresponding to the analog circuit, and a bidirectional diode group provided between the first ground potential line and the second ground potential line.
Yasuyuki Morishita
Filed: 26 Jul 19
Utility
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9 Dec 21
The present invention is to reduce detection of an erroneous edge caused by variation in a case of a sampling frequency that is not larger than a data transmission frequency.
Koichi ISHIMI, Akio FUJII
Filed: 13 May 21
Utility
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7 Dec 21
A failure diagnostic apparatus includes a path calculation unit which calculates, for each input pattern to a diagnosis target cell, a path affecting an output value of the diagnosis target cell when a failure is assumed as an activation path, a path classification unit which classifies the activation path associated with the input pattern for which the diagnosis target cell has passed a test and the activation path associated with the input pattern for which the diagnosis target cell has failed the test, a path narrowing unit which calculates a first failure candidate path, a second failure candidate path and a normal path of the diagnosis target cell based on classified activation paths, and a result output unit which outputs information on the first failure candidate path, the second failure candidate path and the normal path.
Yukihisa Funatsu, Kazuki Shigeta
Filed: 14 Dec 20
Utility
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7 Dec 21
It is an object of the present invention to provide a technique capable of reducing power consumption of a semiconductor device even when the semiconductor device operates at high speed.
Naotaka Kawakami, Toshiro Fujisaki
Filed: 19 Jun 19
Utility
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7 Dec 21
A semiconductor device for achieving consistency of data is provided.
Katsushige Matsubara, Seiji Mochizuki
Filed: 14 Nov 19
Utility
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7 Dec 21
Reliability of a semiconductor device is improved.
Naoki Fujita, Hiroyuki Nakamura
Filed: 10 Apr 19
Utility
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7 Dec 21
In a memory cell forming region including a dummy cell region, a plurality of fins which are parts of a semiconductor substrate, protrude from an upper surface of an element isolation portion and are formed adjacent to each other.
Katsuhiro Uchimura
Filed: 16 Sep 19
Utility
6nq0jm48hn7y8eug3lv7oratb1tt6cb5z7hnrbh31f02
2 Dec 21
To provide a memory protection circuit and a memory protection method suitable for quick data transfer between a plurality of virtual machines via a common memory, according to an embodiment, a memory protection circuit includes a first ID storing register that stores therein an ID of any of a plurality of virtual machines managed by a hypervisor, an access determination circuit that permits the virtual machine having the ID stored in the first ID storing register to access a memory, a second ID storing register that stores therein an ID of any of the virtual machines, and an ID update control circuit that permits the virtual machine having the ID stored in the second ID storing register to rewrite the ID stored in the first ID storing register.
Takashi ICHIKAWA
Filed: 12 Aug 21
Utility
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2 Dec 21
A semiconductor device includes a plurality of memory cells connected to a match line; a word line driver connected to a word line; a valid cell configured to store a valid bit indicating valid or invalid of an entry; a first precharge circuit connected to one end of the match line and configured to precharge the match line to a high level; and a second precharge circuit connected to the other end of the match line and configured to precharge the match line to a high level.
Makoto YABUUCHI
Filed: 12 May 21
Utility
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2 Dec 21
A gate electrode is formed on a semiconductor substrate between an n-type source region and an n-type drain region via a first insulating film.
Yotaro GOTO, Katsumi EIKYU, Yoshihiro NOMURA
Filed: 10 May 21
Utility
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30 Nov 21
Provided is a data processing device that reduces the amount of memory access in a case where data and an error control code are to be stored in a memory.
Katsushige Matsubara, Seiji Mochizuki, Keisuke Matsumoto
Filed: 30 Mar 20