1577 patents
Page 32 of 79
Utility
Semiconductor device and method of manufacturing thereof
28 Sep 21
In a semiconductor device including a plurality of memory regions formed of split-gate type MONOS memories, threshold voltages of memory cells are set to different values for each memory region.
Naoki Takizawa, Tomoya Saito
Filed: 13 May 19
Utility
Semiconductor device and method of manufacturing the same
28 Sep 21
The semiconductor device includes, in plan view, a gate electrode having a first portion located on a side surface portion where a plurality of emitter regions are formed, and a gate electrode having a second portion located between the plurality of emitter regions.
Nobue Maekawa
Filed: 10 Dec 19
Utility
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28 Sep 21
The performances of a semiconductor device of a memory element are improved.
Masao Inoue
Filed: 24 Apr 20
Utility
pmrlvixs49eraa2y0qs7d9 s5qft4zffc13403elgerkxbhztsygn9n8
28 Sep 21
A power control circuit according to one embodiment includes an H-bridge circuit formed using a plurality of power transistors.
Shunichi Kaeriyama
Filed: 16 Jul 19
Utility
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23 Sep 21
For simplifying the dual-damascene formation steps of a multilevel Cu interconnect, a formation step of an antireflective film below a photoresist film is omitted.
Katsuhiko HOTTA, Kyoko SASAHARA
Filed: 9 Jun 21
Utility
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23 Sep 21
In a data processing device comprising a memory controller controlling writing/reading of data to/from the memory, a processor requesting writing/reading of data, and an error detection module requesting writing/reading of data to/from the memory controller in accordance with a request from the processor, an error detection module calculates a first error detection code of the first data having a write request from the processor, reads the second data having a read request from the processor from the memory, calculates a second error detection code from the read data, compares the first error detection code and the second error detection code, and transmits the result of the comparison to the external module.
Katsushige MATSUBARA, Ryoji HASHIMOTO, Takahiro IRITA, Kenichi SHIMADA, Tetsuya SHIBAYAMA
Filed: 17 Mar 20
Utility
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21 Sep 21
An object of the present invention is to provide a technique of duplexing monitor circuits in which a common cause failure can be eliminated.
Kan Takeuchi, Shinya Konishi, Fumio Tsuchiya, Masaki Shimada
Filed: 10 Sep 18
Utility
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21 Sep 21
A technique is provided which can facilitate management of data in a memory device in a semiconductor device including the memory device and a data processing device.
Atsunori Hirobe
Filed: 8 Mar 18
Utility
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21 Sep 21
A processor device capable of raising a hit rate of branch destination prediction is provided.
Masanao Sasai
Filed: 8 Mar 18
Utility
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21 Sep 21
The power control device reliably disconnects the current path of the failed output transistor.
Naohiro Yoshimura, Osamu Soma
Filed: 28 Aug 19
Utility
m0brnslqeiue5nxo6eag0v3w sadocvaz9dn8rqs4skp8h
14 Sep 21
To provide a memory protection circuit and a memory protection method suitable for quick data transfer between a plurality of virtual machines via a common memory, according to an embodiment, a memory protection circuit includes a first ID storing register that stores therein an ID of any of a plurality of virtual machines managed by a hypervisor, an access determination circuit that permits the virtual machine having the ID stored in the first ID storing register to access a memory, a second ID storing register that stores therein an ID of any of the virtual machines, and an ID update control circuit that permits the virtual machine having the ID stored in the second ID storing register to rewrite the ID stored in the first ID storing register.
Takashi Ichikawa
Filed: 7 May 19
Utility
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14 Sep 21
A semiconductor device capable of enlarging a read margin of a memory cell and a method of surrounding a read of a memory are provided.
Koichi Takeda
Filed: 24 Mar 20
Utility
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7 Sep 21
A semiconductor device includes a first insulating layer, an optical waveguide, a first slab portion, a second insulating layer, and a conductive layer.
Yasutaka Nakashiba, Tohru Kawai
Filed: 14 Oct 19
Utility
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7 Sep 21
The master interface generates copy data by copying the first data, and generates an error detection code based on the copy data.
Sho Yamanaka, Toshiyuki Hiraki
Filed: 27 Apr 20
Utility
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7 Sep 21
A terrace insulating film (SL) to be overridden by a gate electrode (G) of an nLDMOS device is configured by LOCOS, and a device isolation portion (SS) is configured by STI.
Makoto Koshimizu, Hideki Niwayama, Kazuyuki Umezu, Hiroki Soeda, Atsushi Tachigami, Takeshi Iijima
Filed: 11 Mar 20
Utility
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7 Sep 21
The present invention provides both a margin of a discharge start voltage with respect to a power supply voltage and a margin of a clamp voltage with respect to a breakdown withstand voltage of an internal circuit.
Koki Narita
Filed: 16 Oct 19
Utility
4l38h0ua58hdpenv88h6q4wwcjxay918mrtscuq9avz09h0hee1c7
7 Sep 21
The present disclosure starts up a three-phase motor in a stable manner.
Satoshi Narumi
Filed: 28 Feb 19
Utility
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7 Sep 21
A semiconductor device capable of improving the efficiencies of communication systems is provided.
Keiichiro Sano, Jean Noel Mouthe
Filed: 17 Dec 19
Utility
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7 Sep 21
The present invention provides a semiconductor device having an integration type A/D converter capable of speeding up.
Yoichi Iizuka, Fukashi Morishita
Filed: 30 Oct 19
Utility
f1r1yxx6t7ckdgvbgmhey5o264b3dkb6nlpvrz35ym74wtejyi6zueie
2 Sep 21
In a method of manufacturing a semiconductor device according to one embodiment, after a semiconductor wafer including a non-volatile memory, a bonding pad and an insulating film comprised of an organic material is provided, a probe needle is contacted to a surface of the bonding pad located in a second region, and a data is written to the non-volatile memory.
Yoshiaki SATO, Mitsunobu WANSAWA, Akira MATSUMOTO, Yoshinori DEGUCHI, Kentaro SAITO
Filed: 14 Jan 21