1577 patents
Page 68 of 79
Utility
Semiconductor Device, Semiconductor System, and Control Method of Semiconductor Device
5 Feb 20
A semiconductor device, a semiconductor system, and a control method of a semiconductor device are capable of accurately monitoring the lowest operating voltage of a circuit to be monitored.
Kazuki FUKUOKA, Toshifumi UEMURA, Yuko KITAJI, Yosuke OKAZAKI, Akira MURAYAMA
Filed: 7 Oct 19
Utility
Information Processing Device, Information Processing Systems, and Programs
5 Feb 20
The information processing device includes: a storage unit that stores model definition information defining a statistical model for each estimation type and an acquisition condition of a feature amount required for estimation using the statistical model; a data acquisition unit that acquires a feature amount from a sensor signal in a first mode according to the acquisition condition and acquires data for generating a new statistical model from a sensor signal in a second mode according to a condition different from the acquisition condition; a determination unit that determines whether the feature amount acquired by the data acquisition unit in the first mode satisfies a requirement defined by the model definition information; and a mode change unit that changes a mode from the first mode to the second mode according to a determination result that the feature amount does not satisfy the requirement.
Norio OKADA
Filed: 21 Jul 19
Utility
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5 Feb 20
A semiconductor device includes a first semiconductor chip on which a first circuit is formed and a second semiconductor chip on which two circuits are formed.
Shinichi KUWABARA, Yasutaka NAKASHIBA, Teruhiro KUWAJIMA
Filed: 7 Jul 19
Utility
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5 Feb 20
A semiconductor device having a contact resistance lower than that of a conventional semiconductor device is provided.
Kazuyuki OMORI
Filed: 22 Jul 19
Utility
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5 Feb 20
In the semiconductor device, a first defect formation preventing film is formed on the first wiring side, and a second defect formation preventing film is formed on the second wiring side. when a ratio of an infrared absorption intensity corresponding to a bond between silicon and hydrogen to an infrared absorption intensity corresponding to a bond between silicon and oxygen is defined as an abundance ratio, the abundance ratio in the first defect formation preventing film is smaller than the abundance ratio in the second interlayer insulating film.
Naohito SUZUMURA, Kazuyuki OMORI
Filed: 23 Jul 19
Utility
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5 Feb 20
A semiconductor device includes semiconductor substrate having outer peripheral sides in plan view, and at least a pair of first bonding pad and second bonding pad formed over the semiconductor substrate.
Kentaro SAITO, Takashi MORIYAMA, Yoshinori DEGUCHI
Filed: 1 Jul 19
Utility
217j8m1sei3vdub5n5c37fi6it96m74mkycxgyj5rf0
3 Feb 20
A semiconductor device is manufactured at an improved efficiency.
Toshitsugu Ishii, Naohiro Makihira, Hidekazu Iwasaki, Jun Matsuhashi
Filed: 16 Apr 18
Utility
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3 Feb 20
A data processing device has an instruction decoder, a control logic unit, and ALU.
Sugako Ohtani, Hiroyuki Kondo
Filed: 22 May 18
Utility
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3 Feb 20
A selection decoder controls levels of a plurality of selection signals based on an address bit having at least one or more bits.
Takeshi Hashizume, Naoya Fujita, Shunya Nagata, Yoshisato Yokoyama, Katsumi Shinbo, Kouji Satou
Filed: 20 May 18
Utility
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3 Feb 20
A data processor includes an access target with the address assigned to a memory space, an access subject that gains access to the access target while specifying address, identifier, and access type, and a memory protection resource including an associative memory to perform an access control.
Koji Adachi, Yoichi Yuyama
Filed: 7 Aug 18
Utility
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3 Feb 20
An object of the present invention is to provide an eye opening degree detection system that can accurately and stably calculate an eye opening degree.
Yuki Mori
Filed: 26 Apr 18
Utility
m31r7v9xejbhp9j1q946pch0eeja5vuv6b7pb6uepcfey97s32b7hi
3 Feb 20
A semiconductor device has a semiconductor chip, a signal lead that is arranged in a periphery of the semiconductor chip and has a main surface and a rear surface opposed to the main surface, a wire that electrically connects the semiconductor chip and the main surface of the signal lead, and a sealing body made of sealing resin that seals the semiconductor chip, the signal lead and the wire.
Tomoya Kashiwazaki
Filed: 26 Jun 15
Utility
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3 Feb 20
A semiconductor device includes a memory component, which is a semiconductor component (a semiconductor chip or a semiconductor package), to be mounted over an upper surface of a wiring substrate.
Yosuke Katsura, Yusuke Tanuma
Filed: 26 Jul 16
Utility
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3 Feb 20
An improvement is achieved in the reliability of a semiconductor device.
Teruhiro Kuwajima, Shinichi Watanuki, Futoshi Komatsu, Tomoo Nakayama
Filed: 14 May 18
Utility
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29 Jan 20
Performance of a semiconductor device is improved.
Kazuyuki OMORI, Seiji MURANAKA, Kazuyoshi MAEKAWA
Filed: 3 Oct 19
Utility
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29 Jan 20
A performance of a semiconductor device is improved.
Noriko OKUNISHI, Toshinori KIYOHARA
Filed: 6 Oct 19
Utility
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29 Jan 20
In a MONOS memory of the split-gate type formed by a field effect transistor formed on a fin, it is prevented that the rewrite lifetime of the MONOS memory is reduced due to charges being locally transferred into and out of an ONO film in the vicinity of the top of the fin by repeating the write operation and the erase operation.
Digh HISAMOTO, Yoshiyuki KAWASHIMA
Filed: 1 Jul 19
Utility
7quho01zcuc025dbmugplnt3p4pnv3lchxko1aphnfncpet86368n5m6dkk
29 Jan 20
A semiconductor device capable of stabilizing an internal voltage is provided.
Hidetoshi OZOE
Filed: 27 Jun 19
Utility
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27 Jan 20
Provided is a search memory capable of suppressing an increase in the area of a chip and an increase in the amount of current consumption.
Hideto Matsuoka
Filed: 13 Nov 18
Utility
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27 Jan 20
A multi-thread processor includes a plurality of hardware threads each of which generates an independent instruction flow, a thread scheduler that manages in what order a plurality of hardware threads are processed with a pre-established schedule, and an interrupt controller that receives an input interrupt request signal and assigns the interrupt request to an associated hardware thread, wherein the interrupt controller comprises a register in which information is stored for each channel of an interrupt request signal, and the information includes information regarding to which one or more than one of the plurality of hardware threads the interrupt request signal is associated.
Koji Adachi, Kazunori Miyamoto
Filed: 13 Mar 13