1577 patents
Page 14 of 79
Utility
Semiconductor device and test method of semiconductor device
7 Feb 23
A semiconductor device includes a first temperature sensor module, a second temperature sensor module, a first temperature controller, and a second temperature controller.
Tadashi Kameyama, Masanori Ikeda
Filed: 18 Nov 19
Utility
DC-DC converter
7 Feb 23
A DC-DC converter includes a high-side switch coupled between a first power supply and an output terminal, a low-side switch coupled between a second power supply and the output terminal, an inductor coupled to the output terminal, and a reverse current monitoring circuit that determines that a reverse current from the inductor to the output terminal occurs when the output terminal becomes a high voltage during a state in which the high-side switch and the low-side switch are in a dead time.
Masayuki Ida, Yasuhiko Kokami, Hideyuki Tajima, Hiroyuki Inoue, Noboru Inomata
Filed: 30 Dec 20
Utility
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2 Feb 23
A semiconductor device includes a semiconductor substrate, a semiconductor layer, a first insulating film, and a conductive film.
Hirokazu SAYAMA, Fumihiko HAYASHI, Junjiro SAKAI
Filed: 6 Oct 22
Utility
6zpcsol3sbm5wr5gojr49thj3z88zmq
31 Jan 23
The power line communication device detects inverter noise from the voltage waveforms of the power line, and executes the output of the transmission signal in a period in which it is determined that the signal amplitude of the transmission signal in the transmission processing unit exceeds a predetermined value from the output amplitude of the inverter noise, and stops the output of the transmission signal in other periods.
Kosuke Shibuya, Yoshitaka Shibuya
Filed: 14 Sep 21
Utility
bvm6sw1o6leqj3kfuiirlxavrfwz8a
31 Jan 23
A processing system includes a receiving circuit 1 for receiving an input signal from an externally connected sensor, an expected signal generating circuit 4 for automatically generating a teaching signal for use in the learning circuit 5, a learning circuit 5 for calculating a weight value, a bias value, and the like of the neural network model to form an expected signal from the teaching signal generated by the expected signal generating circuit 4 and the signal from the receiving circuit 1, an inference circuit 2 for performing signal processing based on a learned model of the neural network model generated by the learning circuit 5, and a validity verification circuit 3′ for performing similarity calculation between an output signal of the inference circuit 2 and an expected signal for comparison.
Yasushi Wakayama
Filed: 10 Dec 19
Utility
13ppr5oz5qylqp2hw6ojfhe6001zmbc640kvlbihhojnk462xyzy0w76
31 Jan 23
A semiconductor device includes a memory array arranged in a matrix, a plurality of word lines provided corresponding to memory cell rows, a word driver for driving one of the plurality of word lines, a plurality of row select lines connected to the word driver, and a row decoder for outputting a row select signal to the plurality of row select lines based on input row address information.
Shunya Nagata, Yoshikazu Saito, Takeshi Hashizume
Filed: 26 Jan 21
Utility
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26 Jan 23
Reliability of a semiconductor device is improved by suppressing occurrence of variation in characteristics of the semiconductor device provided with a power MOSFET that has a super junction structure.
Yasutaka NAKASHIBA, Masami SAWADA
Filed: 31 May 22
Utility
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26 Jan 23
An image sensor including an ADC circuit receiving pixel data to be supplied in parallel from the a pixel array, outputting a reference signal in accordance with a digital code, comparing the reference signal and the pixel data, and outputting the digital code at which the reference signal and the pixel data have a predetermined relation, the ADC circuit including a ramp-signal generating circuit outputting a ramp signal having a gradient with respect to change of the digital code, the gradient being different between when the digital code is in a first range and when the digital code is in a second range different from the first range and an attenuator receiving the ramp signal to be supplied and outputting the reference signal having a gradient being the same between when the digital code is in the first range and when the digital code is in the second range.
Fukashi MORISHITA
Filed: 27 Jun 22
Utility
0k3jw77tawq14r3z6 8axgy05l43wyu3f89e
26 Jan 23
The source region, drain region, buried insulating film, gate insulating film, and gate electrode of the semiconductor device are formed in a main surface of a semiconductor substrate.
Makoto KOSHIMIZU, Yasutaka NAKASHIBA
Filed: 20 Jul 21
Utility
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26 Jan 23
A semiconductor device includes a first semiconductor chip, an adhesive layer that is formed on the first semiconductor chip, and a second semiconductor chip that is arranged on the first semiconductor chip via the adhesive layer.
Yasutaka NAKASHIBA
Filed: 20 Jul 21
Utility
hiavgsvd4sx0rf7ivj17v6hb73tqhgjt48hlm9ioma07c71qk7envte
26 Jan 23
A semiconductor device capable of changing a data programming process in a simple manner according to a situation is provided.
Genta WATANABE, Ken MATSUBARA, Tomoya SAITO, Akihiko KANDA, Koichi TAKEDA, Takahiro SHIMOI
Filed: 23 Jun 22
Utility
0adh24g5iualzdmxh0dzmqodxd9ccxmh1vddj
26 Jan 23
In a semiconductor device in a wafer state, an element region and a scribe region are defined in one main surface of a semiconductor substrate.
Takehirou MARIKO, Yasuhiro OKAMOTO, Senichirou NAGASE
Filed: 31 May 22
Utility
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24 Jan 23
An abnormality detection apparatus including a feature extraction circuit configured to extract a feature point and a feature value of a first image, and a feature point and a feature value of a second image, a flow calculation circuit configured to calculate, based on the feature value of the first image, a first abnormality detection circuit configured to detect an abnormality in the first image based on a first optical flow, and to detect an abnormality in the second image based on a third optical flow, and a second abnormality detection circuit configured to detect an abnormality in the first or second image based on a result of a comparison between the second optical flow and a fourth optical flow.
Yuki Kajiwara, Kosuke Miyagawa, Masaki Nishibu, Kentaro Sasahara
Filed: 26 May 20
Utility
6mcltqrb2l5vu058tl1ndr6erquvkdm2lvqh5bztxbe4gcmq124a3plx2
24 Jan 23
The semiconductor device 1 comprises a processor 2, a memory connected to the processor and a control circuit, and comprises an active operation mode and a standby operation mode.
Koichi Tanigawa, Takayoshi Shiraishi
Filed: 15 Apr 21
Utility
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24 Jan 23
A wafer having a semiconductor substrate including a peripheral region and a central region, an insulating layer and a semiconductor layer is prepared first.
Hideki Makiyama
Filed: 7 Jul 21
Utility
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24 Jan 23
A semiconductor device has a first area in which first and third semiconductor elements are formed, a second area in which second and fourth semiconductor elements are formed, and a third area located between the first and second areas.
Shinichi Kuwabara, Yasutaka Nakashiba
Filed: 3 Mar 21
Utility
pnfkulhv5gc11l5r990pbk5pdr8woqb05pnas95v7f9y31b9s0plr7ie1rdo
24 Jan 23
A method for manufacturing a semiconductor device to provide a Metal Insulator Semiconductor Field Effect Transistor (MISFET) in a first region of a semiconductor substrate includes forming a first gate insulating film on the semiconductor substrate in the first region, forming a first gate electrode containing silicon on the first gate insulating film, forming first impurity regions inside the semiconductor substrate so as to sandwich the first gate electrode in the first region, the first impurity regions configuring a part of a first source region and a part of a first drain region, forming a first silicide layer on the first impurity region, forming a first insulating film on the semiconductor substrate so as to cover the first gate electrode and the first silicide layer, polishing the first insulating film so as to expose the first gate electrode, and forming a second silicide layer on the first gate electrode.
Tadashi Yamaguchi
Filed: 18 Jul 19
Utility
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24 Jan 23
A trench is formed by removing a portion of each of the charge accumulation film and the insulating film located between the control gate electrode and the memory gate electrode.
Atsushi Amo
Filed: 14 Jul 20
Utility
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19 Jan 23
A semiconductor device includes a semiconductor substrate, a buried insulating film, a first conductive film, an insulating layer, a first contact and a second contact.
Tohru KAWAI, Yasutaka NAKASHIBA
Filed: 16 Sep 22
Utility
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19 Jan 23
Placement of bridges connecting CAE tools and virtual ECU simulation tools is facilitated.
Mitsugu INOUE, Koichi SATO
Filed: 8 Jun 22