28912 patents
Page 31 of 1446
Utility
Method of manufacturing a semiconductor device
19 Dec 23
A conductive gate over a semiconductor fin is cut into a first conductive gate and a second conductive gate.
Shu-Uei Jang, Chen-Huang Huang, Ryan Chia-Jen Chen, Shiang-Bau Wang, Shu-Yuan Ku
Filed: 7 Dec 20
Utility
Semiconductor package with improved interposer structure
19 Dec 23
A semiconductor package is provided.
Yi-Wen Wu, Techi Wong, Po-Hao Tsai, Po-Yao Chuang, Shih-Ting Hung, Shin-Puu Jeng
Filed: 12 Aug 21
Utility
Semiconductor device and method
19 Dec 23
In an embodiment, a device includes: a conductive shield on a first dielectric layer; a second dielectric layer on the first dielectric layer and the conductive shield, the first and second dielectric layers surrounding the conductive shield, the second dielectric layer including: a first portion disposed along an outer periphery of the conductive shield; a second portion extending through a center region of the conductive shield; and a third portion extending through a channel region of the conductive shield, the third portion connecting the first portion to the second portion; a coil on the second dielectric layer, the coil disposed over the conductive shield; an integrated circuit die on the second dielectric layer, the integrated circuit die disposed outside of the coil; and an encapsulant surrounding the coil and the integrated circuit die, top surfaces of the encapsulant, the integrated circuit die, and the coil being level.
Tzu-Sung Huang, Chen-Hua Yu, Hung-Yi Kuo, Hao-Yi Tsai, Ming Hung Tseng
Filed: 26 Jul 21
Utility
Semiconductor structure including a semiconductor wafer and a surface mount component overhanging a periphery of the semiconductor wafer
19 Dec 23
A semiconductor structure includes a semiconductor wafer, a first surface mount component, a second surface mount component and a first barrier structure.
Mao-Yen Chang, Chih-Wei Lin, Hao-Yi Tsai, Kuo-Lung Pan, Chun-Cheng Lin, Tin-Hao Kuo, Yu-Chia Lai, Chih-Hsuan Tai
Filed: 3 Jul 22
Utility
Semiconductor structure including isolation structure and method for forming isolation structure
19 Dec 23
A semiconductor structure includes a semiconductor substrate, an image sensor, and an isolation structure.
Tzung-Yi Tsai, Kuo-Yu Wu, Tse-Hua Lu
Filed: 19 Mar 21
Utility
Sacrificial layer for semiconductor process
19 Dec 23
A method of forming a semiconductor device includes forming a source/drain region and a gate electrode adjacent the source/drain region, forming a hard mask over the gate electrode, forming a bottom mask over the source/drain region, wherein the gate electrode is exposed, and performing a nitridation process on the hard mask over the gate electrode.
Tsan-Chun Wang, Su-Hao Liu, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo
Filed: 21 Feb 22
Utility
Method for forming semiconductor device
19 Dec 23
A method of forming a semiconductor device includes forming a gate structure on a semiconductor substrate.
Chung-Ting Li, Jen-Hsiang Lu, Chih-Hao Chang
Filed: 7 Aug 20
Utility
Chip package structure with ring-like structure
19 Dec 23
A chip package structure is provided.
Sheng-Yao Yang, Ling-Wei Li, Yu-Jui Wu, Cheng-Lin Huang, Chien-Chen Li, Lieh-Chuan Chen, Che-Jung Chu, Kuo-Chio Liu
Filed: 13 Dec 22
Utility
Semiconductor device and method of forming the same
19 Dec 23
A semiconductor device includes a first Chip-On-Wafer (CoW) device having a first interposer and a first die attached to a first side of the first interposer; a second CoW device having a second interposer and a second die attached to a first side of the second interposer, the second interposer being laterally spaced apart from the first interposer; and a redistribution structure extending along a second side of the first interposer opposing the first side of the first interposer and extending along a second side of the second interposer opposing the first side of the second interposer, the redistribution structure extending continuously from the first CoW device to the second CoW device.
Jiun Yi Wu, Chen-Hua Yu, Shang-Yun Hou
Filed: 20 Jul 22
Utility
Semiconductor packages including passive devices and methods of forming same
19 Dec 23
An embodiment is a structure including a first semiconductor device and a second semiconductor device, a first set of conductive connectors mechanically and electrically bonding the first semiconductor device and the second semiconductor device, a first underfill between the first and second semiconductor devices and surrounding the first set of conductive connectors, a first encapsulant on at least sidewalls of the first and second semiconductor devices and the first underfill, and a second set of conductive connectors electrically coupled to the first semiconductor device, the second set of conductive connectors being on an opposite side of the first semiconductor device as the first set of conductive connectors.
Shin-Puu Jeng, Po-Yao Chuang, Shuo-Mao Chen
Filed: 7 Mar 22
Utility
Multi-chip semiconductor package
19 Dec 23
A semiconductor package includes a first die; a first redistribution structure over the first die, the first redistribution structure being conterminous with the first die; a second die over the first die, a first portion of the first die extending beyond a lateral extent of the second die; a conductive pillar over the first portion of the first die and laterally adjacent to the second die, the conductive pillar electrically coupled to first die; a molding material around the first die, the second die, and the conductive pillar; and a second redistribution structure over the molding material, the second redistribution structure electrically coupled to the conductive pillar and the second die.
Yu-Chia Lai, Kuo Lung Pan, Hung-Yi Kuo, Tin-Hao Kuo, Hao-Yi Tsai, Chung-Shi Liu, Chen-Hua Yu
Filed: 9 Aug 22
Utility
Integrated circuits with gate cut features
19 Dec 23
Examples of an integrated circuit with gate cut features and a method for forming the integrated circuit are provided herein.
Zhi-Chang Lin, Wei-Hao Wu, Jia-Ni Yu, Chih-Hao Wang, Kuo-Cheng Ching
Filed: 22 Dec 20
Utility
Integrated circuit device including a power supply line and method of forming the same
19 Dec 23
A device includes a first semiconductor strip and a second semiconductor strip extending longitudinally in a first direction, where the first semiconductor strip and the second semiconductor strip are spaced apart from each other in a second direction.
Yi-Hsiung Lin, Shang-Wen Chang, Yi-Hsun Chiu
Filed: 12 Jul 21
Utility
Semiconductor device and manufacturing method for the semiconductor device
19 Dec 23
The present disclosure provides a semiconductor device and a method for forming a semiconductor device.
Chun-Yen Peng, Te-Yang Lai, Bo-Feng Young, Chih-Yu Chang, Sai-Hooi Yeong, Chi On Chui
Filed: 30 Mar 22
Utility
Method and structure for reducing source/drain contact resistance at wafer backside
19 Dec 23
A method provides a structure having a fin oriented lengthwise and widthwise along first and second directions respectively, an isolation structure adjacent to sidewalls of the fin, and first and second source/drain (S/D) features over the fin.
Huan-Chieh Su, Li-Zhen Yu, Chun-Yuan Chen, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
Filed: 21 Apr 21
Utility
Localized protection layer for laser annealing process
19 Dec 23
A method of forming a semiconductor device includes forming source/drain contact openings extending through at least one dielectric layer to expose source/drain contact regions of source/drain structures.
Blandine Duriez, Marcus Johannes Henricus Van Dal, Martin Christopher Holland, Gerben Doornbos, Georgios Vellianitis
Filed: 28 Mar 22
Utility
Electrostatic discharge circuit and method of operating same
19 Dec 23
An electrostatic discharge (ESD) circuit includes an ESD detection circuit, a clamp circuit and an ESD assist circuit.
Chia-Lin Hsu, Ming-Fu Tsai, Yu-Ti Su, Kuo-Ji Chen
Filed: 26 Oct 21
Utility
Manufacturing method of fingerprint sensor
19 Dec 23
A fingerprint sensor includes a die, a plurality of conductive structures, an encapsulant, a plurality of conductive patterns, a first dielectric layer, a second dielectric layer, and a redistribution structure.
Chih-Hsuan Tai, Chih-Hua Chen, Hao-Yi Tsai, Yu-Chih Huang, Chia-Hung Liu, Ting-Ting Kuo, Ying-Cheng Tseng
Filed: 22 Dec 22
Utility
Method and structure of cut end with self-aligned double patterning
19 Dec 23
Semiconductor device and the manufacturing method thereof are disclosed herein.
Hsi-Wen Tien, Wei-Hao Liao, Pin-Ren Dai, Chih Wei Lu, Chung-Ju Lee
Filed: 1 Mar 21
Utility
Method for forming semiconductor device with multi-layer etch stop structure
19 Dec 23
A method for forming a semiconductor device structure is provided.
Po-Cheng Shih, Tze-Liang Lee, Jen-Hung Wang, Yu-Kai Lin, Su-Jen Sung
Filed: 16 Mar 22