291 patents
Page 8 of 15
Utility
Algorithms and circuitry for verifying a value stored during a programming operation of a non-volatile memory cell in an analog neural memory in deep learning artificial neural network
12 Oct 21
Various algorithms are disclosed for verifying the stored weight in a non-volatile memory cell in a neural network following a multilevel programming operation of the non-volatile memory cell by converting the stored weight into a plurality of digital output bits.
Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Anh Ly
Filed: 21 Mar 19
Utility
Finfet Split Gate Non-volatile Memory Cells with Enhanced Floating Gate to Floating Gate Capacitive Coupling
30 Sep 21
Memory cells formed on upwardly extending fins of a semiconductor substrate, each including source and drain regions with a channel region therebetween, a floating gate extending along the channel region and wrapping around the fin, a word line gate extending along the channel region and wrapping around the fin, a control gate over the floating gate, and an erase gate over the source region.
Feng Zhou, Xian Liu, Steven Lemke, Hieu Van Tran, Nhan Do
Filed: 13 Oct 20
Utility
Precision Tuning of a Page or Word of Non-volatile Memory Cells and Associated High Voltage Circuits for an Analog Neural Memory Array In an Artificial Neural Network
23 Sep 21
Numerous embodiments for performing tuning of a page or a word of non-volatile memory cells in an analog neural memory are disclosed.
HIEU VAN TRAN, THUAN VU, STEPHEN TRINH, STANLEY HONG, ANH LY, STEVEN LEMKE, VIPIN TIWARI, NHAN DO
Filed: 17 Sep 20
Utility
Output Circuitry for Non-volatile Memory Array In Neural Network
16 Sep 21
A number of circuits for use in an output block coupled to a non-volatile memory array in a neural network are disclosed.
Farnood Merrikh Bayat, Xinjie Guo, Dmitri Strukov, Nhan Do, Hieu Van Tran, Vipin Tiwari, Mark Reiten
Filed: 22 Apr 21
Utility
Charge pump for use in non-volatile flash memory devices
14 Sep 21
Numerous embodiments of an improved charge pump design are disclosed for generating the high voltages necessary to perform erase and program operations in non-volatile flash memory devices.
Hieu Van Tran, Anh Ly, Thuan Vu, Kha Nguyen, Hien Pham, Stanley Hong, Stephen T. Trinh
Filed: 20 Oct 20
Utility
Analog Neural Memory Array In Artificial Neural Network with Substantially Constant Array Source Impedance with Adaptive Weight Mapping and Distributed Power
9 Sep 21
Numerous embodiments of analog neural memory arrays are disclosed.
Hieu Van Tran, Thuan VU, Stephen TRINH, Stanley HONG, Anh LY, Vipin Tiwari
Filed: 6 Aug 20
Utility
Analog Neural Memory Array Storing Synapsis Weights In Differential Cell Pairs In Artificial Neural Network
9 Sep 21
Numerous embodiments of analog neural memory arrays are disclosed.
Hieu Van Tran, Thuan VU, STEPHEN TRINH, STANLEY HONG, ANH LY, VIPIN Tiwari
Filed: 6 Aug 20
Utility
Method of forming a device with FinFET split gate non-volatile memory cells and FinFET logic devices
7 Sep 21
A method of forming a device with a silicon substrate having upwardly extending first and second fins.
Feng Zhou, Xian Liu, JinHo Kim, Serguei Jourba, Catherine Decobert, Nhan Do
Filed: 27 Feb 20
Utility
Method Of Forming A Device With FINFET Split Gate Non-volatile Memory Cells And FINFET Logic Devices
2 Sep 21
A method of forming a device with a silicon substrate having upwardly extending first and second fins.
Feng Zhou, Xian Liu, JinHo Kim, Serguei Jourba, Catherine Decobert, Nhan Do
Filed: 27 Feb 20
Utility
Ultra-precise Tuning of Analog Neural Memory Cells In a Deep Learning Artificial Neural Network
26 Aug 21
Embodiments for ultra-precise tuning of a selected memory cell are disclosed.
Steven Lemke, Hieu Van Tran, Yuri Tkachev, Louisa Schneider, Henry A. Om'Mani, Thuan Vu, Nhan Do, Vipin Tiwari
Filed: 4 Aug 20
Utility
Wear Leveling In Eeprom Emulator Formed of Flash Memory Cells
26 Aug 21
The present invention relates to systems and methods for implementing wear leveling in a flash memory device that emulates an EEPROM.
Guangming Lin, Xiaozhou Qian, Xiao Yan Pi, Vipin Tiwari, Zhenlin Ding
Filed: 28 Aug 20
Utility
Set-While-Verify Circuit And Reset-While Verify Circuit For Resistive Random Access Memory Cells
19 Aug 21
Numerous embodiments of circuitry for a set-while-verify operation and a reset-while verify operation for resistive random access memory cells are disclosed.
HIEU VAN TRAN, ANH LY, THUAN VU, STANLEY HONG, FENG ZHOU, XIAN LIU, NHAN DO
Filed: 11 Mar 21
Utility
Programming Analog Neural Memory Cells In Deep Learning Artificial Neural Network
19 Aug 21
Numerous embodiments are disclosed for a high voltage generation algorithm and system for generating high voltages necessary for a particular programming operation in analog neural memory used in a deep learning artificial neural network.
Hieu Van Tran, Thuan Vu, Stanley Hong, Anh Ly, Vipin Tiwari, Nhan Do
Filed: 3 Mar 21
Utility
Decoders for analog neural memory in deep learning artificial neural network
10 Aug 21
Numerous embodiments of decoders for use with a vector-by-matrix multiplication (VMM) array in an artificial neural network are disclosed.
Hieu Van Tran, Stanley Hong, Anh Ly, Thuan Vu, Hien Pham, Kha Nguyen, Han Tran
Filed: 29 May 18
Utility
Flash Memory Cell and Associated High Voltage Row Decoder
5 Aug 21
The present invention relates to a flash memory cell with only four terminals and a high voltage row decoder for operating an array of such flash memory cells.
Hieu Van Tran, Anh Ly, Thuan Vu
Filed: 23 Apr 21
Utility
Method of forming split gate memory cells
3 Aug 21
A method of forming a memory device includes forming a second insulation layer on a first conductive layer formed on a first insulation layer formed on semiconductor substrate.
Leo Xing, Chunming Wang, Guo Yong Liu, Melvin Diao, Xian Liu, Nhan Do
Filed: 6 May 20
Utility
Verification of a Weight Stored In a Non-volatile Memory Cell In a Neural Network Following a Programming Operation
29 Jul 21
Numerous embodiments are disclosed for verifying a weight programmed into a selected non-volatile memory cell in a neural memory.
FARNOOD MERRIKH BAYAT, XINJIE GUO, DMITRI STRUKOV, NHAN DO, HIEU VAN TRAN, VIPIN TIWARI, MARK REITEN
Filed: 16 Apr 21
Utility
Non-volatile memory device with stored index information
27 Jul 21
A memory device that includes a memory array having pluralities of non-volatile memory cells, a plurality of index memory cells each associated with a different one of the pluralities of the non-volatile memory cells, and a controller.
Xiaozhou Qian, Xiao Yan Pi, Vipin Tiwari
Filed: 9 Mar 20
Utility
Programming circuit and method for flash memory array
20 Jul 21
An improved method and apparatus for programming advanced nanometer flash memory cells is disclosed.
Hieu Van Tran, Anh Ly, Thuan Vu, Hung Quoc Nguyen
Filed: 17 Sep 19
Utility
Precise Data Tuning Method and Apparatus for Analog Neural Memory In an Artificial Neural Network
8 Jul 21
Numerous embodiments of a precision programming algorithm and apparatus are disclosed for precisely and quickly depositing the correct amount of charge on the floating gate of a non-volatile memory cell within a vector-by-matrix multiplication (VMM) array in an artificial neural network.
Hieu Van Tran, Steven Lemke, Vipin Tiwari, Nhan Do, Mark Reiten
Filed: 25 Mar 20