28912 patents
Page 17 of 1446
Utility
Pellicle for an EUV lithography mask and a method of manufacturing thereof
2 Jan 24
A pellicle for an EUV photo mask includes a first layer; a second layer; and a main layer disposed between the first layer and second layer and including a plurality of nanotubes.
Tzu-Ang Chao, Chao-Ching Cheng, Han Wang
Filed: 14 Jan 22
Utility
Target control in extreme ultraviolet lithography systems using aberration of reflection image
2 Jan 24
A method of controlling an extreme ultraviolet (EUV) lithography system is disclosed.
Ting-Ya Cheng, Han-Lung Chang, Shi-Han Shann, Li-Jui Chen, Yen-Shuo Su
Filed: 23 May 22
Utility
Extractor piping on outermost sidewall of immersion hood apparatus
2 Jan 24
In some embodiments, the present disclosure relates to a process tool that includes a lithography apparatus arranged over a wafer chuck and an immersion hood apparatus laterally around the lithography apparatus.
Yung-Yao Lee, Wei Chih Lin
Filed: 7 Dec 22
Utility
Multi-metal fill with self-aligned patterning and dielectric with voids
2 Jan 24
Photolithography overlay errors are a source of patterning defects, which contribute to low wafer yield.
Tai-I Yang, Wei-Chen Chu, Hsiang-Wei Liu, Shau-Lin Shue, Li-Lin Su, Yung-Hsu Wu
Filed: 19 Jul 22
Utility
Semiconductor manufacturing system, behavior recognition device and semiconductor manufacturing method
2 Jan 24
A behavior recognition device for recognizing behaviors of a semiconductor manufacturing apparatus includes a storage device and a control unit.
Kai-Ting Yang, Li-Jen Ko, Hsiang Yin Shen
Filed: 18 Aug 20
Utility
Static random access memory cell
2 Jan 24
A static random access memory (SRAM) cell includes substrate, a first semiconductor fin, a first gate structure, a second semiconductor fin, and a second gate structure.
Jordan Hsu, Yu-Kuan Lin, Shau-Wei Lu, Chang-Ta Yang, Ping-Wei Wang, Kuo-Hung Lo
Filed: 2 Jun 22
Utility
Memory device and SRAM cell
2 Jan 24
A device includes a first horizontal-gate-all-around (HGAA) transistor, a second HGAA transistor, a first vertical-gate-all-around (VGAA) transistor, and a second VGAA transistor.
Hung-Yu Ye, Chung-Yi Lin, Yun-Ju Pan, Chee-Wee Liu
Filed: 10 Mar 22
Utility
Semiconductor device including insulating element and method of making
2 Jan 24
A method of making a semiconductor device includes forming a first transistor on a substrate, wherein forming the first transistor comprises forming a first source/drain electrode in the substrate.
Chin-Shan Wang, Shun-Yi Lee
Filed: 8 Jul 21
Utility
Semiconductor device and method of manufacturing the same
2 Jan 24
In a method of manufacturing a semiconductor device, the semiconductor device includes a non-volatile memory formed in a memory cell area and a ring structure area surrounding the memory cell area.
Meng-Han Lin, Chih-Ren Hsieh, Ching-Wen Chan
Filed: 3 Jan 22
Utility
Memory device, integrated circuit device and method
2 Jan 24
A memory device includes a bit line, a word line, a memory cell, select bit lines, and a controller.
Meng-Han Lin, Sai-Hooi Yeong, Han-Jong Chia, Chenchen Jacob Wang, Yu-Ming Lin
Filed: 19 Jan 23
Utility
Magnetic random access memory and manufacturing method thereof
2 Jan 24
In a method of manufacturing a semiconductor device, a magnetic random access memory (MRAM) cell structure is formed.
Shy-Jay Lin, Chwen Yu, William J. Gallagher
Filed: 26 Jul 21
Utility
MRAM fabrication and device
2 Jan 24
A top electrode of a magnetoresistive random access memory (MRAM) device over a magnetic tunnel junction (MTJ) is formed using a film of titanium nitride oriented in a (111) crystal structure rather than a top electrode which uses tantalum, tantalum nitride, and/or a multilayer including tantalum and tantalum nitride.
Jung-Tang Wu, Wu Meng Yu, Szu-Hua Wu, Chin-Szu Lee, Han-Ting Tsai, Yu-Jen Chien
Filed: 30 Aug 21
Utility
Memory cell, method of forming the same, and semiconductor device having the same
2 Jan 24
Yu-Chao Lin, Tung-Ying Lee
Filed: 27 Apr 22
Utility
Integrated circuit fin structure manufacturing method
2 Jan 24
A method of manufacturing an IC structure includes forming a first plurality of fins extending in a first direction on a substrate, a second plurality of fins extending adjacent to the first plurality of fins, a third plurality of fins extending adjacent to the second plurality of fins, and a fourth plurality of fins extending adjacent to the third plurality of fins.
Po-Hsiang Huang, Fong-Yuan Chang, Clement Hsingjen Wann, Chih-Hsin Ko, Sheng-Hsiung Chen, Li-Chun Tien, Chia-Ming Hsu
Filed: 13 Dec 22
Utility
Placement method and non-transitory computer readable storage medium
2 Jan 24
A placement method for integrated circuit design is provided.
Chen-Fa Tsai, Che-Li Lin, Chia-Min Lin, Chung-Wei Huang, Liang-Chi Zane
Filed: 15 Nov 21
Utility
Conductor scheme selection and track planning for mixed-diagonal-manhattan routing
2 Jan 24
The routing of conductors in the conductor layers in an integrated circuit are routed using mixed-Manhattan-diagonal routing.
Sheng-Hsiung Chen, Huang-Yu Chen, Chung-Hsing Wang, Jerry Chang Jui Kao
Filed: 3 Oct 22
Utility
Electromigration evaluation methodology with consideration of current distribution
2 Jan 24
The present disclosure provides a method for evaluating a heat sensitive structure.
Hsien Yu-Tseng, Wei-Ming Chen
Filed: 14 Oct 20
Utility
System and method of verifying slanted layout components
2 Jan 24
Disclosed herein are related to performing layout verification of a layout design of an integrated circuit having a slanted layout component.
Yuan-Te Hou, Min-Yuan Tsai
Filed: 6 Aug 21
Utility
Optical sensor and methods of making the same
2 Jan 24
Optical sensors and their making methods are described herein.
You-Cheng Jhang, Han-Zong Pan, Wei-Ding Wu, Jiu-Chun Weng, Hsin-Yu Chen, Cheng-San Chou, Chin-Min Lin
Filed: 23 Nov 22
Utility
Read circuit for magnetic tunnel junction (MTJ) memory
2 Jan 24
In some embodiments, the present application provides a memory device.
Gaurav Gupta, Zhiqiang Wu
Filed: 19 May 22