28912 patents
Page 21 of 1446
Utility
Semiconductor device and method
2 Jan 24
In an embodiment, a device includes: a passivation layer on a semiconductor substrate; a first redistribution line on and extending along the passivation layer; a second redistribution line on and extending along the passivation layer; a first dielectric layer on the first redistribution line, the second redistribution line, and the passivation layer; and an under bump metallization having a bump portion and a first via portion, the bump portion disposed on and extending along the first dielectric layer, the bump portion overlapping the first redistribution line and the second redistribution line, the first via portion extending through the first dielectric layer to be physically and electrically coupled to the first redistribution line.
Chen-Shien Chen, Ting-Li Yang, Po-Hao Tsai, Chien-Chen Li, Ming-Da Cheng
Filed: 18 May 21
Utility
Integrated circuit package and method of forming thereof
2 Jan 24
A semiconductor package includes a redistribution structure, a first device and a second device attached to the redistribution structure, the first device including: a first die, a support substrate bonded to a first surface of the first die, and a second die bonded to a second surface of the first die opposite the first surface, where a total height of the first die and the second die is less than a first height of the second device, and where a top surface of the substrate is at least as high as a top surface of the second device, and an encapsulant over the redistribution structure and surrounding the first device and the second device.
Hsien-Wei Chen, Ming-Fa Chen, Ying-Ju Chen
Filed: 29 Jun 21
Utility
Bonding to alignment marks with dummy alignment marks
2 Jan 24
A method includes placing a first package component.
Hsien-Wei Chen, Ying-Ju Chen, Ming-Fa Chen
Filed: 20 May 21
Utility
Power gating cell structure
2 Jan 24
A power gating cell on an integrated circuit is provided.
Wei-Ling Chang, Jung-Chan Yang, Li-Chun Tien, Ting Yu Chen
Filed: 15 Sep 20
Utility
Semiconductor device and method
2 Jan 24
In an embodiment, a device includes: a first fin extending from a substrate; a second fin extending from the substrate; a gate spacer over the first fin and the second fin; a gate dielectric having a first portion, a second portion, and a third portion, the first portion extending along a first sidewall of the first fin, the second portion extending along a second sidewall of the second fin, the third portion extending along a third sidewall of the gate spacer, the third portion and the first portion forming a first acute angle, the third portion and the second portion forming a second acute angle; and a gate electrode on the gate dielectric.
Shahaji B. More, Chandrashekhar Prakash Savant
Filed: 24 Mar 21
Utility
High-K gate dielectric
2 Jan 24
Semiconductor devices and methods are provided.
Chia-Hao Pao, Chih-Hsuan Chen, Yu-Kuan Lin
Filed: 27 May 22
Utility
Inner spacer structure and methods of forming such
2 Jan 24
A first layer is formed over a substrate; a second layer is formed over the first layer; and a third layer is formed over the second layer.
Che-Lun Chang, Jiun-Ming Kuo, Ji-Yin Tsai, Yuan-Ching Peng
Filed: 28 Apr 21
Utility
Rough buffer layer for group III-V devices on silicon
2 Jan 24
Various embodiments of the present application are directed towards a group III-V device including a rough buffer layer.
Kuei-Ming Chen, Chi-Ming Chen, Chung-Yi Yu
Filed: 19 Jul 22
Utility
Electrostatic discharge (ESD) protection circuit and method of operating the same
2 Jan 24
An electrostatic discharge (ESD) protection circuit includes a first diode, a second diode, an ESD clamp circuit and a first conductive structure on a backside of a semiconductor wafer, and being coupled to the first voltage supply.
Yu-Hung Yeh, Wun-Jie Lin, Jam-Wem Lee
Filed: 30 Mar 23
Utility
Semiconductor Memory Devices and Methods of Manufacturing Thereof
28 Dec 23
A semiconductor device includes a word line (WL) structure.
Meng-Han Lin, Chia-En Huang, Sai-Hooi Yeong
Filed: 15 Feb 23
Utility
Integrated Circuit Device and Method for Fabricating the Same
28 Dec 23
An integrated circuit device includes a substrate and a memory device.
Kuo-Yu HSIANG, Chun-Yu LIAO, Jen-Ho LIU, Min-Hung LEE
Filed: 24 Jun 22
Utility
Ferroelectric Device and Methods of Forming the Same
28 Dec 23
Various embodiments of the present disclosure provide a memory device and methods of forming the same.
Hung-Wei LI, Sai-Hooi YEONG, Chia-Ta YU, Chih-Yu CHANG, Wen-Ling LU, Yu-Chien CHIU, Ya-Yun CHENG, Mauricio MANFRINI, Yu-Ming LIN
Filed: 25 Jun 22
Utility
Memory Device
28 Dec 23
A memory device is provided.
Elia Ambrosi, Xinyu BAO, Cheng-Hsien Wu
Filed: 9 Jan 23
Utility
Electric Device, Its Circuit Board and Method of Manufacturing the Electric Device
28 Dec 23
An electric device includes a semiconductor assembly, a circuit board, first conductive pads and second conductive pads.
Chih-Chieh LIAO, Yu-Min SUN, Chih-Feng CHENG
Filed: 10 Aug 22
Utility
3D Memory Multi-stack Connection Method
28 Dec 23
A memory device includes a first memory array including: a plurality of memory strings spaced from each other along a first lateral direction and a second lateral direction, each of the plurality of memory strings including a plurality of memory cells arranged along a vertical direction; and a plurality of first conductive structures extending along the vertical direction; wherein each of the plurality of first conductive structures includes a first portion and a second portion; wherein the first portion extends across the plurality of memory cells of a corresponding pair of the plurality of memory strings along the vertical direction, and the second portion is disposed over the first portion along the vertical direction; and wherein the second portion extends farther than the first portion along at least one of the first or second lateral direction.
Chia-En Huang, Meng-Han Lin, Ya-Hui Wu
Filed: 31 Jul 23
Utility
Vertical Phase Change Switch Devices and Methods
28 Dec 23
A phase change device includes a substrate with a top surface.
Kuo-Pin Chang, Yu-Wei Ting, Tsung-Hao Yeh, Kuo-Ching Huang
Filed: 28 Jun 22
Utility
Anisotropic Wet Etching In Patterning
28 Dec 23
Disclosed is a method comprising: providing at least two structures with a metal layer over each; forming a patterned photolithographic layer over the metal layer over the first structure; removing the metal layer from the second structure via wet etch operations using a chemical etchant that is resistant to penetration into the photolithographic layer; and achieving, after wet etch operations, a remaining metal ratio of a distance X over a distance Y that is less than 179 and greater than 1, wherein X is the distance from a first line extending from an edge of the metal layer over the first structure to a second line extending from an edge of a channel region in the second structure, and Y is a second distance from the first line to a third line extending from an edge of the metal layer formed over the channel region in the first structure.
Tefu Yeh, Cheng-Chieh Tu, Ming-Chi Huang, Ying-Liang Chuang, Ming-Hsi Yeh, Kuo-Bin Huang
Filed: 22 Jun 22
Utility
Methods and Systems for Improving Surface Mount Joinder
28 Dec 23
Methods for improving joinder between a surface-mount package and a printed circuit board are disclosed.
Hsien-Wen Liu, Shih-Ting Hung, Jyun-Lin Wu, Yao-Chun Chuang, Yinlung Lu
Filed: 28 Jun 22
Utility
Method for Forming a Contact Plug with Improved Contact Metal Sealing
28 Dec 23
A method is provided for forming a metal contact plug.
Chung-Liang CHENG, Lin-Yu HUANG, Li-Zhen YU, Huang-Lin CHAO, Pinyen LIN
Filed: 23 Jun 22
Utility
Phase-change Material (PCM) Radio Frequency (RF) Switching Device with Air Gap
28 Dec 23
A phase-change material (PCM) switching device includes: a base dielectric layer over a semiconductor substrate; a first heater element disposed on the base dielectric layer, the first heater element comprising a first metal element characterized by a first coefficient of thermal expansion (CTE); a second heater element disposed on the first heater element, the second heater element comprising a second metal element characterized by a second CTE larger than the first CTE; a first metal pad and a second metal pad; and a PCM region comprising a PCM operable to switch between an amorphous state and a crystalline state in response to heat generated by the first heater element and the second heater element, wherein the PCM region is disposed above a top surface of the second heater element, and an air gap surrounds the first heater element and the second heater element from three sides.
Kuo-Pin Chang, Yu-Wei Ting, Yi Ching Ong, Kuo-Ching Huang, Harry-Hak-Lay Chuang
Filed: 28 Jun 22