28912 patents
Page 39 of 1446
Utility
Metal-Insulator-Metal structure
12 Dec 23
Semiconductor devices, integrated circuits and methods of forming the same are provided.
Yuan-Yang Hsiao, Hsiang-Ku Shen, Dian-Hau Chen
Filed: 3 Sep 21
Utility
Interconnect structure with air-gaps
12 Dec 23
The present disclosure, in some embodiments, relates to an integrated chip.
Tai-I Yang, Cheng-Chi Chuang, Yung-Chih Wang, Tien-Lu Lin
Filed: 27 Jul 22
Utility
Semiconductor devices and methods of manufacturing
12 Dec 23
A single layer process is utilized to reduce swing effect interference and reflection during imaging of a photoresist.
Hung-Jui Kuo, Hsing-Chieh Lee, Ming-Tan Lee
Filed: 20 Jul 22
Utility
Semiconductor structure
12 Dec 23
A semiconductor structure includes a substrate including a first region and a second region, a first channel layer disposed in the first region and a second channel layer disposed in the second region, a first dielectric layer disposed on the first channel layer and a second dielectric layer disposed on the second channel layer, and a first gate electrode disposed on the first dielectric layer and a second gate electrode disposed on the second dielectric layer.
I-Ming Chang, Chung-Liang Cheng, Hsiang-Pi Chang, Hung-Chang Sun, Yao-Sheng Huang, Yu-Wei Lu, Fang-Wei Lee, Ziwei Fang, Huang-Lin Chao
Filed: 25 May 21
Utility
Semiconductor devices and methods of manufacturing thereof
12 Dec 23
A semiconductor device includes a plurality of channel layers vertically separated from one another.
Kuei-Yu Kao, Shih-Yao Lin, Chen-Ping Chen, Chih-Chung Chiu, Chen-Yui Yang, Ke-Chia Tseng, Hsien-Chung Huang, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
Filed: 30 Aug 21
Utility
Notched gate structure fabrication
12 Dec 23
A method includes providing a substrate having a channel region, forming a gate stack layer over the channel region, forming a patterned hard mask over the gate stack layer, etching a top portion of the gate stack layer through openings in the patterned hard mask with a first etchant, etching a middle portion and a bottom portion of the gate stack layer with a second etchant that includes a passivating gas.
Chang-Yin Chen, Che-Cheng Chang, Chih-Han Lin
Filed: 9 May 22
Utility
Backside power rail structure and methods of forming same
12 Dec 23
Nanostructure field-effect transistors (nano-FETs) including isolation layers formed between epitaxial source/drain regions and semiconductor substrates and methods of forming the same are disclosed.
Kuo-Cheng Chiang, Shi Ning Ju, Chih-Chao Chou, Wen-Ting Lan, Chih-Hao Wang
Filed: 28 Feb 22
Utility
Semiconductor devices with backside power distribution network and frontside through silicon via
12 Dec 23
The present disclosure describes a semiconductor structure having a power distribution network including first and second conductive lines.
Kam-Tou Sio, Cheng-Chi Chuang, Chia-Tien Wu, Jiann-Tyng Tzeng, Shih-Wei Peng, Wei-Cheng Lin
Filed: 25 Oct 21
Utility
Seal ring structures and methods of forming same
12 Dec 23
Some embodiments relate to a three-dimensional (3D) integrated circuit (IC).
Kuo-Ming Wu, Kuan-Liang Liu, Wen-De Wang, Yung-Lung Lin
Filed: 19 May 22
Utility
Polarizers for image sensor devices
12 Dec 23
The present disclosure is directed to a method of forming a polarization grating structure (e.g., polarizer) as part of a grid structure of a back side illuminated image sensor device.
Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee
Filed: 11 Apr 22
Utility
Semiconductor device structure with channel and method for forming the same
12 Dec 23
A semiconductor device structure is provided.
Huang-Siang Lan, Sathaiya Mahaveer Dhanyakumar, Tzer-Min Shen, Zhiqiang Wu
Filed: 30 Mar 21
Utility
Bipolar junction transistor with gate over terminals
12 Dec 23
Embodiments include a first set of fins having an emitter of a bipolar junction transistor (BJT) disposed over the first set of fins, a second set of fins having a base of the BJT disposed over the second set of fins, and a third set of fins having a collector of the BJT disposed over the third set of fins.
Ming-Shuan Li, Zi-Ang Su, Ying-Keung Leung
Filed: 31 Jan 22
Utility
Semiconductor structure and manufacturing method thereof
12 Dec 23
A semiconductor structure is provided.
Neil Quinn Murray, Katherine H. Chiang, Chung-Te Lin
Filed: 16 Jul 21
Utility
Level shifter circuit and method of operating the same
12 Dec 23
A circuit includes an input circuit, a level shifter circuit and an output circuit.
Jing Ding, Zhang-Ying Yan, Qingchao Meng, Lei Pan
Filed: 4 May 22
Utility
Semiconductor structure and manufacturing method thereof
12 Dec 23
The present disclosure provides a semiconductor structure, including a transistor.
Chun Hao Liao, Chu Fu Chen, Chun-Wei Hsu, Chia-Cheng Pao
Filed: 21 Jun 21
Utility
Method for forming interconnect structure
12 Dec 23
A method includes depositing a first dielectric layer over a first conductive feature, depositing a first mask layer over the first dielectric layer, and depositing a second mask layer over the first mask layer.
Chun-Kai Chen, Jei Ming Chen, Tze-Liang Lee
Filed: 11 Aug 21
Utility
Gap patterning for metal-to-source/drain plugs in a semiconductor device
12 Dec 23
A method may include forming a mask layer on top of a first dielectric layer formed on a first source/drain and a second source/drain, and creating an opening in the mask layer and the first dielectric layer that exposes portions of the first source/drain and the second source/drain.
Yu-Lien Huang, Ching-Feng Fu, Huan-Just Lin, Fu-Sheng Li, Tsai-Jung Ho, Bor Chiuan Hsieh, Guan-Xuan Chen, Guan-Ren Wang
Filed: 10 May 22
Utility
Method of making an integrated circuit package including an integrated circuit die soldered to a bond pad of a redistribution structure
12 Dec 23
An integrated circuit package and a method of forming the same are provided.
Chen-Hua Yu, Hung-Jui Kuo, Ming-Che Ho, Tzung-Hui Lee
Filed: 29 Jun 22
Utility
Semiconductor device and method
12 Dec 23
A semiconductor structure is disclosed, including a first conductive line and a first power rail and a first transistor structure arranged between the first conductive line and the first power rail.
Chung-Hui Chen
Filed: 8 Apr 21
Utility
Semiconductor device with multiple polarity groups
12 Dec 23
A semiconductor device includes passive electrical components in a substrate; and an interconnect structure over the passive electrical components, conductive features of the interconnect structure being electrically coupled to the passive electrical components.
Ying-Cheng Tseng, Yu-Chih Huang, Chih-Hsuan Tai, Ting-Ting Kuo, Chi-Hui Lai, Ban-Li Wu, Chiahung Liu, Hao-Yi Tsai
Filed: 12 Dec 22