997 patents
Page 19 of 50
Utility
Gate driver and power converter
21 Dec 21
A gate driver includes: a timing determination unit configured to measure an on-time of a switching element and configured to determine, based on the on-time, a certain timing during a turn-off period of the switching element as an intermediate timing; and a driving condition changing unit configured to change a gate driving condition of the switching element at the intermediate timing determined by the timing determination unit.
Tsuyoshi Nagano, Kunio Matsubara
Filed: 23 Sep 20
Utility
Semiconductor device
14 Dec 21
A semiconductor device encompasses a cooler made of ceramics, having a first main face and a second main face, being parallel and opposite to the first main face, defined by two opposite side faces perpendicular to the first and second main faces, a plurality of conductive-pattern layers delineated on the first main face, a semiconductor chip mounted on the first main face via one of the plurality of conductive-pattern layers, and a seal member configured to seal the semiconductor chip.
Kohei Yamauchi, Hiromichi Gohara, Ryoichi Kato, Yoshinari Ikeda, Katsumi Taniguchi
Filed: 23 Feb 18
Utility
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14 Dec 21
A semiconductor device is provided including: a semiconductor substrate having a first-conductivity-type drift region; a second-conductivity-type base region provided above the drift region inside the semiconductor substrate; an accumulation region provided between the drift region and the lower surface of the base region inside the semiconductor substrate, and having a lower second-conductivity-type carrier mobility than the drift region and the base region; a gate trench portion provided from an upper surface of the semiconductor substrate to an inside of the semiconductor substrate, where the gate trench portion is in contact with the base region; and a carrier passage region occupying at least a partial region between the accumulation region and the gate trench portion inside the semiconductor substrate, where the carrier passage region has a higher second-conductivity-type carrier mobility than the accumulation region.
Tatsuya Naito
Filed: 29 Jan 19
Utility
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14 Dec 21
A silicon carbide epitaxial substrate including a silicon carbide semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, and a high-density foreign element region.
Takeshi Tawara
Filed: 10 Mar 20
Utility
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14 Dec 21
A semiconductor device having a first switching device and a second switching device respectively on a power supply side and a ground side of the semiconductor device, for driving a load of the semiconductor device, and a switching control circuit that controls switching of the first and second switching devices.
Masashi Akahane
Filed: 25 Sep 20
Utility
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7 Dec 21
A heat sink 7A is disposed on a circuit board, an air duct is disposed on the heat sink, external cooling air is supplied by the fan attached to the sink air inlet of the heat sink and the air duct inlet of the air duct.
Shun Fukuchi, Masakazu Gekinozu, Takanori Shintani, Masahiro Tatsukawa, Masaki Sakuma
Filed: 20 Feb 18
Utility
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7 Dec 21
To provide a semiconductor device that has barrier metal and has a small variation in a threshold voltage.
Yoshiharu Kato, Tohru Shirakawa
Filed: 3 Jun 19
Utility
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7 Dec 21
A semiconductor module includes an insulation circuit substrate in which circuit patterns are formed on an upper surface of an insulation plate, switching elements that are arranged on an upper surface of the circuit patterns, a first heat dissipation plate that is arranged on a lower surface of the insulation plate, a casing member that surrounds a periphery of the insulation circuit substrate, the switching elements, and the first heat dissipation plate such that a lower surface of the first heat dissipation plate is exposed, and a second heat dissipation plate that is arranged on an upper surface side of the switching elements such that a prescribed gap is provided.
Takeshi Kamimura
Filed: 27 May 20
Utility
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7 Dec 21
Provided is a semiconductor device comprising: a semiconductor substrate; an active section provided in the semiconductor substrate; an edge termination structure section provided between the active section and an outer peripheral edge of the semiconductor substrate on an upper surface of the semiconductor substrate; and an end lifetime control unit that is provided in the semiconductor substrate in the edge termination structure section and is continuous in a range facing at least two or more diode sections arranged in the first direction, wherein the active section includes: a transistor section and the diode sections alternately arranged with the transistor section in a predetermined first direction on the upper surface of the semiconductor substrate.
Tatsuya Naito
Filed: 24 Oct 19
Utility
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7 Dec 21
Provided is a semiconductor device including a semiconductor substrate having a drift region; a transistor portion having a collector region; a diode portion having a cathode region; and a boundary portion arranged between the transistor portion and the diode portion at an upper surface of the semiconductor substrate, and having the collector region, wherein the mesa portion of each of the transistor portion and the boundary portion has an emitter region and a base region, the base region has a channel portion, and a density in the upper surface of the mesa portion in the region in which the channel portion is projected onto the upper surface of the mesa portion of the boundary portion may be smaller than the density of the region in which the channel portion is projected onto the upper surface of the mesa portion of the transistor portion.
Takahiro Tamura, Michio Nemoto
Filed: 30 Sep 19
Utility
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7 Dec 21
A gate drive apparatus including a gate drive unit configured to drive a gate of a switching device, a peak detection unit configured to detect that a voltage across main terminals applied between the main terminals of the switching device during a turn-off period of the switching device is at a peak, and a driving condition changing unit configured to increase a change speed of a gate voltage of the switching device caused by the gate drive unit, in response to a detection that the voltage across main terminals is at a peak.
Tsuyoshi Nagano, Kunio Matsubara
Filed: 26 Jan 21
Utility
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7 Dec 21
Provided is a logic circuit comprising: a switch portion that includes one or more switching devices configured to be turned on and off in accordance with an input signal and is configured to generate an output signal with a logical value according to an operating state of the switching devices; and a clamp portion configured to clamp a voltage of the output signal, of a case where the logical value of the output signal is logic H.
Motomitsu Iwamoto
Filed: 27 Sep 20
Utility
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7 Dec 21
A receiving apparatus is provided, including: a receiving unit to receive a plurality of pulses including a synchronization pulse and a data pulse having a data pulse width corresponding to a data value; a searching unit to search for pulse information indicating a pulse period or the like that falls within a synchronization pulse acceptable range from among pulse information indicating pulse periods or pulse widths of the respective pulses; a detecting unit to detect whether pulse information of a second pulse at a predetermined location relative to a first pulse corresponding to the searched pulse information indicates a pulse period or the like that falls within a data pulse acceptable range; an identifying unit to identify the first pulse as the synchronization pulse on condition that the pulse information of the second pulse indicates a pulse period or the like that falls within the data pulse acceptable range.
Keiichi Itou
Filed: 28 Jun 19
Utility
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30 Nov 21
A semiconductor device, including a first board, a second board having a plurality of through holes passing therethrough, and a plurality of external terminals that are respectively press-fitted into the plurality of through holes of the second board, one end portion of each external terminal passing through the corresponding through hole and being fixed to a front surface of the first board.
Toshiyuki Miyasaka, Yuichiro Hinata
Filed: 25 Nov 20
Utility
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30 Nov 21
A slave communication apparatus including a clock recovering section that recovers a clock signal from a transmission signal having a first signal value when the clock is a first level, a second signal value when the clock is a second level and data has a first data value, and a third signal value between the first and second signal values when the clock is the second level and the data has a second data value; and a data recovering section that recovers the data, wherein the data recovering section sets the data threshold value to be a first setting value between the second and third signal values in response to the recovered data having the second data value, and sets the data threshold value to be a second setting value between the first and third signal values in response to the recovered data having the first data value.
Masashi Akahane
Filed: 28 Jun 19
Utility
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30 Nov 21
A semiconductor assembly is provided, that includes a semiconductor chip including an upper surface electrode and a lower surface electrode opposite to the upper surface electrode, a metallic wiring plate electrically connected to the semiconductor chip, and a soldering portion that bonds the upper surface electrode of the semiconductor chip to the metallic wiring plate by soldering, the semiconductor chip including a temperature detection portion, an anode wire for the temperature detection portion, and a first insulation layer that blocks the soldering portion and insulates the soldering portion from the anode wire.
Keiichi Higuchi
Filed: 26 Jan 20
Utility
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30 Nov 21
A semiconductor module includes a laminated substrate that includes a heat radiating plate, and an insulation layer having a conductive pattern thereof and being disposed on a top surface of the heat radiating plate, a semiconductor element disposed on a top surface of the conductive pattern, an integrated circuit that controls driving of the semiconductor element, a control-side lead frame having a primary surface on which the integrated circuit is disposed, and a mold resin that seals the laminated substrate, the semiconductor element, the integrated circuit, and the control-side lead frame.
Nobuhiro Higashi
Filed: 31 Dec 19
Utility
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30 Nov 21
A semiconductor module internally includes semiconductor elements and multilayer substrates on which the semiconductor elements are arranged.
Satoshi Kaneko, Naoyuki Kanai
Filed: 1 Oct 19
Utility
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30 Nov 21
A semiconductor device includes circuit substrates 3 and 9 including circuit pattern layers 3c/9b, a semiconductor element 5 mounted to the circuit pattern layer 3c, a connecting pin 7 connecting the semiconductor element 5 to the circuit pattern layer 9b, a pin-shaped terminal 17 connected to the circuit pattern layer 9b, a sealing member 2 sealing the circuit substrates 3 and 9, the semiconductor element 5, and the connecting pin 7, and an external terminal 27 including a flat plate portion 27s and an extending portion 27t bent from the flat plate portion 27s and extends away from the circuit substrate 9, in which the flat plate portion 27s is connected to the pin-shaped terminal 17 and arranged in parallel with the circuit pattern layer 9b, and the extending portion 27t is provided in a range of a width in a transverse direction of the sealing member 2.
Hideyo Nakamura, Motohito Hori, Yuki Inaba
Filed: 25 Feb 20
Utility
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30 Nov 21
Provided is a resistance element, including: a semiconductor substrate; a first insulating film stacked on the semiconductor substrate; a resistance layer selectively stacked on the first insulating film; a first auxiliary film separated from the resistance layer; a second auxiliary film separated from the resistance layer in a direction different from that of the first auxiliary film; a second insulating film stacked on the first insulating film to cover the resistance layer, and the first auxiliary film and the second auxiliary film; a first electrode connected to the resistance layer and stacked on the second insulating film disposed on an upper side of the first auxiliary film; and a second electrode connected to the resistance layer by being separated from the first electrode and stacked on the second insulating film on the upper side of the second auxiliary film.
Masaru Saito, Masaharu Yamaji, Osamu Sasaki, Hitoshi Sumida
Filed: 27 Jun 19