7578 patents
Page 18 of 379
Utility
Direct Word Line Contact and Methods of Manufacture for 3D Memory
16 Nov 23
Described are memory devices having an array region and an extension region adjacent the array region.
Chang Seok Kang, Tomohiko Kitajima, Sung-Kwan Kang, Gill Yong Lee
Filed: 1 May 23
Utility
Flexible Cover Lens Films
16 Nov 23
Flexible display devices, such as flexible cover lens films, are discussed and provided herein.
Manivannan THOTHADRI, Daniel Paul FORSTER, Robert F. PRAINO, JR., Harvey YOU
Filed: 25 Jul 23
Utility
High Resolution Advanced Oled Sub-pixel Circuit and Patterning Method
16 Nov 23
Embodiments described herein relate to a sub-pixel.
Jungmin LEE, Chung-chia CHEN, Ji Young CHOUNG, Yu-hsin LIN
Filed: 10 May 23
Utility
Polishing pads having selectively arranged porosity
14 Nov 23
Polishing pads having discrete and selectively arranged regions of varying porosity within a continuous phase of polymer material are provided herein.
Aniruddh Jagdish Khanna, Jason G. Fung, Puneet Narendra Jawali, Rajeev Bajaj, Adam Wade Manzonie, Nandan Baradanahalli Kenchappa, Veera Raghava Reddy Kakireddy, Joonho An, Jaeseok Kim, Mayu Yamamura
Filed: 29 Sep 20
Utility
Centerfinding for a process kit or process kit carrier at a manufacturing system
14 Nov 23
A method for finding a center of a process kit and/or a process kit ring is provided.
Ali Utku Pehlivan, Mohsin Waqar, Paul Zachary Wirth, Todd James Brill
Filed: 13 Oct 20
Utility
Faceplate having blocked center hole
14 Nov 23
Exemplary semiconductor processing chambers may include a gasbox.
Fang Ruan, Prashant Kumar Kulshreshtha, Jiheng Zhao, Diwakar Kedlaya
Filed: 27 Nov 19
Utility
Method for holding and releasing a substrate
14 Nov 23
The present disclosure provides a holding arrangement.
Simon Lau
Filed: 18 Apr 22
Utility
Continuous liner for use in a processing chamber
14 Nov 23
Certain embodiments of the present disclosure relate to chamber liners, processing chambers that include chamber liners, and methods of using the same.
James D. Carducci, Kenneth S. Collins, Kartik Ramaswamy
Filed: 31 Oct 22
Utility
Substrate cleaning components and methods in a plating system
14 Nov 23
Systems for cleaning electroplating system components may include an electroplating apparatus including a plating bath vessel.
Nolan Zimmerman, Gregory J. Wilson, Andrew Anten, Richard W. Plavidal, Eric J. Bergman, Tricia Youngbull, Timothy Gale Stolt, Sam Lee
Filed: 29 Mar 19
Utility
Temperature calibration with band gap absorption method
14 Nov 23
A method and apparatus for calibration non-contact temperature sensors within a process chamber are described herein.
Zhepeng Cong, Schubert S. Chu, Nyi O. Myo
Filed: 13 May 22
Utility
Detection of surface particles on chamber components with carbon dioxide
14 Nov 23
A stream including at least one of solid CO2 particles or CO2 droplets is directed toward an article including surface particles.
Changgong Wang, Zhili Zuo, Chang Ke, Song-Moon Suh
Filed: 11 Aug 22
Utility
Multilayer extreme ultraviolet reflector materials
14 Nov 23
Extreme ultraviolet (EUV) mask blanks, production systems therefor, and methods of increasing multilayer film reflectance are disclosed.
Wen Xiao, Binni Varghese, Vibhu Jindal
Filed: 30 Aug 21
Utility
Extreme ultraviolet mask absorber materials
14 Nov 23
Extreme ultraviolet (EUV) mask blanks, methods for their manufacture and production systems therefor are disclosed.
Shuwei Liu, Shiyu Liu, Azeddine Zerrade, Vibhu Jindal
Filed: 23 Mar 21
Utility
Apparatus for post exposure bake of photoresist
14 Nov 23
A method and apparatus for applying an electric field and/or a magnetic field to a photoresist layer without air gap intervention during photolithography processes is provided herein.
Douglas A Buchberger, Jr., Dmitry Lubomirsky, John O. Dukovic, Srinivas D. Nemani
Filed: 15 Feb 21
Utility
Method to achieve non-crystalline evenly distributed shot pattern for digital lithography
14 Nov 23
Methods for patterning a substrate are described.
Joseph R. Johnson, Christopher Dennis Bencher
Filed: 10 May 22
Utility
Alignment mark for front to back side alignment and lithography for optical device fabrication
14 Nov 23
A method for aligning a substrate for fabrication of an optical device is disclosed that includes receiving a substrate having a first side and a second side opposite the first side, the first side of the substrate being oriented towards a scanner, the substrate having an alignment mark formed on the first side of the substrate, scanning the alignment mark with the scanner, and fabricating a first pattern for a first optical device on the first side of the substrate.
Yongan Xu, Ludovic Godet
Filed: 19 Sep 22
Utility
System and method for managing substrate outgassing
14 Nov 23
Embodiments of the present disclosure relate to apparatus, systems and methods for managing organic compounds in thermal processing chambers.
Matthew Spuller, Dongming Iu
Filed: 6 Mar 20
Utility
Delayed pulsing for plasma processing of wafers
14 Nov 23
A method, apparatus and system for processing a wafer in a plasma chamber system, which includes at least a plasma generating element and a biasing electrode, include generating a plasma in the plasma chamber system by applying a source RF source power to the plasma generating element for a first period of time of a pulse period of the RF source power, after the expiration of the first period of time, removing the source RF source power, after a delay after the removal of the RF source power, applying an RF bias signal to the biasing electrode for a second period of time to bias the generated plasma towards the wafer, and after the expiration of the second period of time, removing the RF bias signal from the biasing electrode before a next pulse period of the RF source power.
Akhil Mehrotra, Vinay Shankar Vidyarthi, Daksh Agarwal, Samaneh Sadighi, Jason Kenney, Rajinder Dhindsa
Filed: 29 Oct 18
Utility
Methods for pressure ramped plasma purge
14 Nov 23
Exemplary deposition methods may include forming a plasma of a silicon-containing precursor and at least one additional precursor within a processing region of a semiconductor processing chamber.
Madhu Santosh Kumar Mutyala, Sanjay Kamath, Deenesh Padhi
Filed: 5 Feb 20
Utility
CVD based oxide-metal multi structure for 3D NAND memory devices
14 Nov 23
Implementations described herein generally relate to a method for forming a metal layer and to a method for forming an oxide layer on the metal layer.
Susmit Singha Roy, Kelvin Chan, Hien Minh Le, Sanjay Kamath, Abhijit Basu Mallick, Srinivas Gandikota, Karthik Janakiraman
Filed: 29 Aug 19